MCP98242T-CE/ST Microchip Technology, MCP98242T-CE/ST Datasheet - Page 30

• Manufacturer Part Number: MCP98242T-CE/ST
• Description: Board Mount Temperature Sensors JEDEC DIMM SER Outpt Temp Snsr SPD EEPROM
• Manufacturer: Microchip Technology

Specifications of MCP98242T-CE/ST

• Full Temp Accuracy: +/- 2 C
• Package / Case: TSSOP-8
• Digital Output - Bus Interface: Serial (2-Wire, I2C)
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Output Type: Digital
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MCP98242
5.3.3.1
The SWP feature is invoked by writing to the write-pro-
tect register. This is done by sending an Address Byte
similar to a normal Write command.
the timing diagram. SWP can be cleared using the
CWP command. See Section 5.3.3.2 “Clear Write
Protect (CWP)”
FIGURE 5-12:
Communication”).
5.3.3.2
The CWP feature is invoked by writing to the clear
write-protect register. This is done by sending an
Address Byte similar to a normal Write command.
Figure 5-14
SWP only. PWP can not be cleared using this
command.
FIGURE 5-13:
Communication”).
DS21996B-page 30
SCLK
SCLK
SDA
SDA
Note:
Note:
shows the timing diagram. CWP clears
Software Write Protect (SWP)
Clear Write Protect (CWP)
S
S
Apply V
1
0
Apply V
1
0
2
1
Timing Diagram for Setting Software Write Protect (See Section 4.0 “Serial
2
1
Timing Diagram for Setting Clear Write Protect (See Section 4.0 “Serial
Address Byte
Address Byte
3
1
3
1
HI_WP
HI_WP
4
4
0
0
5
0
5
0
at A0 pin, apply V
at A0 pin and connect GND to A1 and A2 pins to initiate SWP cycle.
6
6
Figure 5-14
0
1
7
7
1
1
MCP98242
MCP98242
W
W
8
8
A
C
K
A
C
K
shows
1
X
1
X
DD
2
X
2
X
Word Address
Word Address
at A1 pin, connect A2 pin to GND to initiate CWP cycle.
3
3
X
X
4
4
X
X
5
X
5
X
The Slave Address bits need to correspond to the
address pin logic configuration. For SWP, a high
voltage V
the corresponding slave address needs to be set to ‘1’,
as shown in
grounded and the corresponding slave address bits are
set to ‘0’.
The device response in this mode is shown in
4
The Slave Address bits need to correspond to the
address pin logic configuration. For CWP, a high
voltage V
the corresponding slave address needs to be set to ‘1’.
The A1 pin is set to V
address bit is set to ‘1’. And A2 pins is set to ground
and the corresponding slave address bits are set to ‘0’.
Table 5-3
response in this mode is shown in
Table
and
6
6
X
X
7
7
X
X
5-5.
Table
MCP98242
MCP98242
8
8
X
X
HI_WP
HI_WP
shows the bit configuration. The device
A
C
K
A
C
K
5-5.
Table
1
1
X
X
needs to be applied to the A0 pin and
needs to be applied to the A0 pin and
2
2
X
X
5-3. Both A2 and A1 pins are
3
3
X
X
DD
© 2008 Microchip Technology Inc.
Data
Data
4
4
X
X
and the corresponding slave
5
5
X
X
6
6
X
X
7
7
X
X
MCP98242
MCP98242
8
8
X
X
Table 5-4
A
C
K
A
C
K
P
P
Table 5-
and