CY7C68300C-56PVXC Cypress Semiconductor Corp, CY7C68300C-56PVXC Datasheet - Page 10

IC USB 2.0 BRIDGE AT2LP 56-SSOP

CY7C68300C-56PVXC

Manufacturer Part Number
CY7C68300C-56PVXC
Description
IC USB 2.0 BRIDGE AT2LP 56-SSOP
Manufacturer
Cypress Semiconductor Corp
Series
CY7Cr
Type
USB to ATA/ATAPI Bridger

Specifications of CY7C68300C-56PVXC

Package / Case
56-SSOP
Controller Type
USB 2.0 Controller
Interface
I²C
Voltage - Supply
3.15 V ~ 3.45 V
Current - Supply
50mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Number Of Bits
48
Operating Temperature Range
0 C to + 70 C
Supply Current
10 mA
Operating Supply Voltage
3.3 V
Controller Family/series
(8051) USB
Core Size
8 Bit
No. Of I/o's
6
Embedded Interface Type
I2C, USB
Digital Ic Case Style
SSOP
Supply Voltage Range
3V To 3.6V
Rohs Compliant
Yes
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Operating Temperature (max)
70C
Package Type
SSOP
Rad Hardened
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
CY4615B - KIT USB TO ATA REFERENCE DESIGN
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
428-2266-5
CY7C68300C-56PVXC

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Table 1. AT2LP Pin Descriptions
Note: (Italic pin names denote pin functionality during CY7C68300A compatibility mode)
Document 001-05809 Rev. *B
TQFP
100
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
QFN
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
56
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
SSOP
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
56
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
VBUSPWRD
LOWPWR#
Pin Name
DIOW#
DMACK#
DIOR#
GND
GND
GND
GND
GND
SDA
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
SCL
V
V
V
V
NC
NC
NC
NC
NC
NC
NC
CC
CC
CC
CC
[2]
O/Z
O/Z
O/Z
PWR
PWR
PWR
PWR
Type
I/O
I/O
I/O
I/O
GND
I/O
I/O
I/O
I/O
GND
GND
Pin
NC
NC
NC
NC
NC
I/O
O
O
I
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
Default State
several ms at
Driven HIGH
Driven HIGH
Driven HIGH
at Startup
Active for
(CMOS)
(CMOS)
(CMOS)
startup.
Input
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
No connect.
Clock signal for I
page 12). Apply a 2.2k pull up resistor.
Data signal for I
page 12).
Apply a 2.2k pull up resistor.
No connect.
V
ATA data bit 0.
ATA data bit 1.
ATA data bit 2.
ATA data bit 3.
V
Ground.
No connect.
Ground.
No connect.
Ground.
ATA data bit 4.
ATA data bit 5.
ATA data bit 6.
ATA data bit 7. Apply a 1k pull down to GND.
Ground.
V
Ground.
No connect.
V
ATA control.
ATA control.
ATA control.
No connect.
USB suspend indicator. (See
page 14).
No connect.
Bus powered mode selector. (See
page 14).
CC
CC
CC
CC
. Connect to 3.3V power source.
. Connect to 3.3V power source.
. Connect to 3.3V power source.
. Connect to 3.3V power source.
(continued)
CY7C68300C, CY7C68301C
CY7C68320C, CY7C68321C
2
C interface. (See
2
Pin Description
C interface. (See
“LOWPWR#”
“VBUSPWRD”
“SCL, SDA”
“SCL, SDA”
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