PCA9564BS,118 NXP Semiconductors, PCA9564BS,118 Datasheet - Page 22
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PCA9564BS,118
Manufacturer Part Number
PCA9564BS,118
Description
IC CTRL PARALLEL/I2C BUS 20HVQFN
Manufacturer
NXP Semiconductors
Datasheet
1.PCA9564PW112.pdf
(32 pages)
Specifications of PCA9564BS,118
Package / Case
20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
Controller Type
Parallel Bus to I²C Bus Controller
Interface
I²C
Voltage - Supply
2.3 V ~ 3.6 V
Current - Supply
6mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Logic Family
PCA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
High Level Output Current
- 7 mA
Low Level Output Current
8.5 mA
Mounting Style
SMD/SMT
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.3 V
Number Of Circuits
Single
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
568-4001 - DEMO BOARD FOR PCA9564
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-3405-2
935272895118
PCA9564BS-T
935272895118
PCA9564BS-T
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PCA9564BS,118
Manufacturer:
Exar
Quantity:
68
Philips Semiconductors
I
All the timing limits are valid within the operating supply voltage and ambient temperature range; V
T
2006 Sep 01
2
amb
t
SYMBOL
t
C-BUS TIMING SPECIFICATIONS
VD;DAT(H)
VD;DAT(L)
Parallel bus to I
t
t
t
t
t
t
SU;STO
VD;ACK
HD;STA
SU;STA
HD;DAT
SU;DAT
t
t
f
t
HIGH
LOW
SCL
BUF
t
= –40 to +85 C; and refer to V
t
SP
t
R
F
SDA
SCL
Operating frequency
Bus free time between STOP and START conditions
Hold time after (repeated) START condition
Repeated START condition setup time
Setup time for STOP condition
Data in hold time
Valid time for ACK condition
Data out valid time LOW
Data out valid time HIGH
Data setup time
Clock LOW period
Clock HIGH period
Clock/Data fall time
Clock/Data rise time
Pulse width of spikes that must be suppressed by the input filters
t
F
S
2
t
C-bus controller
HD;STA
t
LOW
IL
and V
t
R
PARAMETER
t
HD;DAT
IH
with an input voltage of V
t
SU;DAT
t
HIGH
Figure 18. Definition of timing
t
F
t
SU;STA
22
S
SS
R
to V
DD
t
.
HD;STA
STANDARD-MODE
MIN
250
4.7
4.0
4.7
4.0
4.7
4.0
—
—
—
—
—
—
0
0
I
2
C-BUS
DD
t
SP
MAX
100
0.6
0.6
0.6
0.3
t
= 2.5 V
50
SU;STO
—
—
—
—
—
—
—
—
1
t
R
0.2 V and 3.3 V
P
MIN
100
1.3
0.6
0.6
0.6
1.3
0.6
—
—
—
—
—
—
0
0
FAST-MODE
t
I
BUF
2
C-BUS
S
PCA9564
MAX
Product data sheet
400
0.6
0.6
0.6
0.3
0.3
—
—
—
—
—
—
—
—
50
0.3 V,
SU01755
UNITS
kHz
ns
ns
ns
s
s
s
s
s
s
s
s
s
s
s