MCP2515-E/ST Microchip Technology, MCP2515-E/ST Datasheet - Page 36

• Manufacturer Part Number: MCP2515-E/ST
• Description: IC CAN CONTROLLER W/SPI 20TSSOP
• Manufacturer: Microchip Technology

Specifications of MCP2515-E/ST

• Package / Case: 20-TSSOP
• Controller Type: CAN Interface
• Interface: SPI
• Voltage - Supply: 2.7 V ~ 5.5 V
• Current - Supply: 10mA
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Product: Controller Area Network (CAN)
• Number Of Transceivers: 1
• Data Rate: 1 Mbps
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Supply Current (max): 10 mA
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Ic Interface Type: SPI
• No. Of Tx Buffers: 3
• No. Of Rx Buffers: 2
• No. Of Filters: 6
• No. Of Masks: 2
• No. Of Interrupts: 1
• Supply Voltage Range: 2.7V To 5.5V
• Digital Ic Case Style: TSSOP
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MCP2515DM-BM - BOARD DEMO FOR MCP2515/51MCP2515DM-PTPLS - BOARD DAUGHTER PICTAIL MCP2515MCP2515DM-PCTL - BOARD DEMO FOR MCP2515DV251001 - KIT DEVELOPMENT CAN MCP2510
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MCP2515
REGISTER 4-15:
\
REGISTER 4-16:
REGISTER 4-17:
DS21801F-page 36
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4-2
bit 1-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
R/W-0
R/W-0
R/W-0
EID15
SID2
EID7
SID: Standard Identifier Mask bits <2:0>
These bits hold the mask bits to be applied to bits<2:0> of the Standard Identifier portion of a received
message
Unimplemented: Reads as ‘0’
EID: Extended Identifier Mask bits <17:16>
These bits hold the mask bits to be applied to bits <17:16> of the Extended Identifier portion of a
received message
EID: Extended Identifier bits <15:8>
These bits hold the filter bits to be applied to bits <15:8> of the Extended Identifier portion of a received
message
EID: Extended Identifier Mask bits <7:0>
These bits hold the mask bits to be applied to the bits <7:0> of the Extended Identifier portion of a
received message
R/W-0
R/W-0
EID14
R/W-0
SID1
EID6
RXMnSIDL – MASK n STANDARD IDENTIFIER LOW
(ADDRESS: 21h, 25h)
RXMnEID8 – MASK n EXTENDED IDENTIFIER HIGH
(ADDRESS: 22h, 26h)
RXMnEID0 – MASK n EXTENDED IDENTIFIER LOW
(ADDRESS: 23h, 27h)
W = Writable bit
W = Writable bit
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
‘1’ = Bit is set
R/W-0
R/W-0
EID13
R/W-0
SID0
EID5
R/W-0
R/W-0
EID12
EID4
U-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
EID11
R/W-0
EID3
U-0
—
R/W-0
EID10
R/W-0
EID2
U-0
—
© 2010 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
x = Bit is unknown
R/W-0
EID17
R/W-0
R/W-0
EID9
EID1
R/W-0
R/W-0
R/W-0
EID16
EID8
EID0
bit 0
bit 0
bit 0