ISP1160BM01-S ST-Ericsson Inc, ISP1160BM01-S Datasheet - Page 68

• Manufacturer Part Number: ISP1160BM01-S
• Description: IC USB HOST CONTROLLER 64LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1160BM01-S

• Controller Type: USB 2.0 Controller
• Interface: Parallel
• Voltage - Supply: 3.3V, 5V
• Current - Supply: 47mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Philips Semiconductors
Table 62:
Table 64:
9397 750 13963
Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcITLBufferPort register: bit allocation
HcATLBufferPort register: bit allocation
R/W
R/W
R/W
R/W
15
15
0
7
0
0
7
0
10.6.7 HcATLBufferPort register (R/W: 41H/C1H)
Table 63:
The HCD must set the byte count into the HcTransferCounter register and check the
HcBufferStatus register before reading from or writing to the buffer. The HCD must
write the command (40H to read, C0H to write) once only, and then read or write both
bytes of the data word. After every read/write, the pointer of ITL buffer RAM will be
automatically increased by two to point to the next data word until it reaches the value
of the HcTransferCounter register; otherwise, an internal EOT signal is not generated
to set bit 2 (AllEOTInterrupt) of the Hc PInterrupt register and update the
HcBufferStatus register.
The HCD must take care of the fact that the internal buffer RAM is organized in bytes.
The HCD must write the byte count into the HcTransferCounter register, but the HCD
reads or writes the buffer RAM by 16 bits (by 1 word).
This is the ATL buffer RAM read/write port. Bits 15 to 8 contain the data byte that
comes from the Acknowledged Transfer List (ATL) buffer RAM’s odd address.
Bits 7 to 0 contain the data byte that comes from the ATL buffer RAM’s even address.
Code (Hex): 41 — read
Code (Hex): C1 — write
Table 65:
Bit
15 to 0
Bit
15 to 0
R/W
R/W
R/W
R/W
14
14
0
6
0
0
6
0
Symbol
DataWord[15:0]
Symbol
DataWord[15:0]
HcITLBufferPort register: bit description
HcATLBufferPort register: bit description
R/W
R/W
R/W
R/W
13
13
0
5
0
0
5
0
Rev. 05 — 24 December 2004
R/W
R/W
R/W
R/W
12
12
DataWord[15:8]
DataWord[15:8]
0
4
0
0
4
0
DataWord[7:0]
DataWord[7:0]
Description
Description
Read/write ITL buffer RAM’s two data bytes.
Read/write ATL buffer RAM’s two data bytes.
R/W
R/W
R/W
R/W
11
11
0
3
0
0
3
0
Embedded USB Host Controller
R/W
R/W
R/W
R/W
10
10
0
2
0
0
2
0
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
R/W
R/W
R/W
R/W
9
0
1
0
9
0
1
0
ISP1160
R/W
R/W
R/W
R/W
8
0
0
0
8
0
0
0
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