ISP1761BE-S ST-Ericsson Inc, ISP1761BE-S Datasheet - Page 127
ISP1761BE-S
Manufacturer Part Number
ISP1761BE-S
Description
IC USB CONTROLLER 128LQFP
Manufacturer
ST-Ericsson Inc
Datasheet
1.ISP1761BEUM.pdf
(164 pages)
Specifications of ISP1761BE-S
Controller Type
USB Peripheral Controller
Interface
Serial
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
128-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Other names
ISP1761BE,551
Q2203522
Q2203522
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Table 146. DcScratch - Device Controller Scratch register (address 0278h) bit allocation
Table 148. Unlock Device register (address 027Ch) bit allocation
ISP1761_5
Product data sheet
Bit
Symbol
Reset
Bus reset
Access
Bit
Symbol
Reset
Bus reset
Access
Bit
Symbol
Reset
Bus reset
Access
Bit
Symbol
Reset
Bus reset
Access
10.8.5 Unlock Device register
10.8.6 Interrupt Pulse Width register
R/W
R/W
15
15
W
W
0
7
0
7
Table 147. DcScratch - Device Controller Scratch register (address 0278h) bit description
To protect registers from getting corrupted when the ISP1761 goes into suspend, the write
operation is disabled. In this case, when the chip resumes, the Unlock Device command
must first be issued to this register before attempting to write to the rest of the registers.
This is done by writing unlock code (AA37h) to this register. The bit allocation of the
Unlock Device register is given in
Table 149. Unlock Device register (address 027Ch) bit description
Table 150
Bit
15 to 8
7 to 0
Bit
15 to 0
R/W
R/W
14
14
W
W
0
6
0
6
shows the bit description of the register.
Symbol
ULCODE[15:0]
Symbol
SFIRH[7:0]
SFIRL[7:0]
R/W
R/W
13
13
W
W
0
5
0
5
Rev. 05 — 13 March 2008
Description
Unlock Code: Writing data AA37h unlocks internal registers and
FIFOs for writing, following a resume.
Description
Scratch firmware information register (higher byte)
Scratch firmware information register (lower byte)
ULCODE[15:8] = AAh
ULCODE[7:0] = 37h
R/W
R/W
12
12
W
W
0
4
0
4
not applicable
not applicable
not applicable
not applicable
Table
SFIRH[7:0]
unchanged
unchanged
SFIRL[7:0]
148.
R/W
R/W
11
11
W
W
0
3
0
3
R/W
R/W
10
10
W
W
0
2
0
2
Hi-Speed USB OTG controller
R/W
R/W
W
W
9
0
1
0
9
1
© NXP B.V. 2008. All rights reserved.
ISP1761
126 of 163
R/W
R/W
W
W
8
0
0
0
8
0
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