IDT82V2108BB IDT, Integrated Device Technology Inc, IDT82V2108BB Datasheet - Page 76
IDT82V2108BB
Manufacturer Part Number
IDT82V2108BB
Description
IC FRAMER T1/J1/E1 8CH 144-BGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.IDT82V2108PX8.pdf
(292 pages)
Specifications of IDT82V2108BB
Controller Type
T1/E1/J1 Framer
Interface
Parallel
Voltage - Supply
2.97 V ~ 3.63 V
Current - Supply
160mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
144-BGA
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
82V2108BB
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IDT82V2108
Table 32: Transmit System Interface Bit Offset (CHI [b3, E1-01CH] = 1, CMS [b2, E1-018H] = 1)
Functional Description
Table 31: Transmit System Interface Bit Offset (CHI [b3, E1-01CH] = 1, CMS [b2, E1-018H] = 0)
(b3, E1-018H)
(b3, E1-018H)
FE
0
0
1
1
FE
0
0
1
1
TSCFS
TSDn
(b4, E1-018H)
TSCCKB
TSDn
(b4, E1-018H)
The CHI (b3, E1-01CH) = 0 and the bit offset is 0:
The bit offset is set as: CHI (b3, E1-01CH) = 0, BOFF[2:0] (b2~0, E1-01CH) = 010; i.e. 2-bit offset:
For example: in Transmit Clock Slave mode, CMS (b2, E1-018H) = 1, FE (b3, E1-018H) = 1, DE (b4, E1-018H) = 1:
DE
0
1
0
1
DE
0
1
0
1
1
2
000
6
7
7
6
000
4
3
3
4
3
1
TS31
4
2
Figure 49. Transmit Bit Offset in E1 Mode - 2
001
5
3
10
10
11
11
001
6
5
5
6
TS31
6
4
7
5
010
010
14
15
15
14
8
7
7
8
8
6
1
7
66
8
2
011
BOFF[2:0] (b2~0, E1-01CH)
10
10
011
9
9
18
19
19
18
BOFF[2:0] (b2~0, E1-01CH)
1
3
4
2
TS0
100
5
3
12
12
11
11
100
22
23
23
22
6
4
TS0
7
5
101
14
13
13
14
101
8
6
26
27
27
26
1
7
2
8
110
16
15
15
16
T1 / E1 / J1 OCTAL FRAMER
110
30
31
31
30
TS2
3
1
4
2
111
18
17
17
18
TS2
3
111
34
35
35
34
March 5, 2009
4
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