IDT82V2108PXG IDT, Integrated Device Technology Inc, IDT82V2108PXG Datasheet - Page 262
IDT82V2108PXG
Manufacturer Part Number
IDT82V2108PXG
Description
IC FRAMER T1/J1/E1 8CH 128-PQFP
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.IDT82V2108PX8.pdf
(292 pages)
Specifications of IDT82V2108PXG
Controller Type
T1/E1/J1 Framer
Interface
Parallel
Voltage - Supply
2.97 V ~ 3.63 V
Current - Supply
160mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
128-MQFP, 128-PQFP
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
82V2108PXG
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Quantity:
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IDT82V2108
T1 / J1 RPLC Channel Indirect Address / Control (052H, 0D2H, 152H, 1D2H, 252H, 2D2H, 352H, 3D2H)
R/WB:
A[6:0]:
T1 / J1 RPLC Channel Indirect Data Buffer (053H, 0D3H, 153H, 1D3H, 253H, 2D3H, 353H, 3D3H)
isters, the byte to be written must be written into this register before the target indirect register address and R/WB = 0 is written into the Address/Con-
trol register, initiating the access. If data is to be read from the indirect registers, only the target indirect register address and R/WB = 1 is written into
the Address/Control register, initiating the request. After 640 ns, this register will contain the requested data byte.
Programming Information
Bit Name
Bit Name
Default
Default
Bit No.
Bit No.
Type
Type
Writing to this register with a valid address and Read/Write command initiates an internal operation cycle to the indirect registers.
= 0: Write the data to the specified indirect register.
= 1: Read the data from the specified indirect register.
Specify the address of the indirect registers (from 01H to 48H) for the microprocessor access.
This register holds the value which will be read from or written to the indirect registers (from 01H to 48H). If data is to be written to the indirect reg-
R/WB
R/W
R/W
D7
7
0
7
0
R/W
R/W
A6
D6
6
0
6
0
R/W
R/W
A5
D5
5
0
5
0
R/W
R/W
A4
D4
4
0
4
0
252
R/W
R/W
D3
A3
3
0
3
0
R/W
R/W
A2
D2
2
0
2
0
T1 / E1 / J1 OCTAL FRAMER
R/W
R/W
A1
D1
1
0
1
0
March 5, 2009
R/W
R/W
A0
D0
0
0
0
0
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