DS2482S-800+T&R Maxim Integrated Products, DS2482S-800+T&R Datasheet - Page 9

IC MASTER I2C-1WIRE 8CH 16-SOIC

DS2482S-800+T&R

Manufacturer Part Number
DS2482S-800+T&R
Description
IC MASTER I2C-1WIRE 8CH 16-SOIC
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS2482S-800+T&R

Controller Type
I²C Bus Controller
Interface
I²C
Voltage - Supply
3.3 V, 5V
Current - Supply
750µA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Single Bit Result (SBR)
The SBR bit reports the logic state of the active 1-Wire line sampled at t
first bit of a 1-Wire Triplet command. The power-on default of SBR is 0. If the 1-Wire Single Bit command sends a
0-bit, SBR should be 0. With a 1-Wire Triplet command, SBR could be 0 as well as 1, depending on the response
of the 1-Wire devices connected. The same result applies to a 1-Wire Single Bit command that sends a 1-bit.
Triplet Second Bit (TSB)
The TSB bit reports the logic state of the active 1-Wire line sampled at t
command. The power-on default of TSB is 0. This bit is updated only with a 1-Wire Triplet command and has no
function with other commands.
Branch Direction Taken (DIR)
Whenever a 1-Write Triplet command is executed, this bit reports to the host processor the search direction that
was chosen by the 3rd bit of the triplet. The power-on default of DIR is 0. This bit is updated only with a 1-Wire
Triplet command and has no function with other commands. For additional information see the description of the 1-
Wire Triplet command and the Dallas Application Note 187, "1-Wire Search Algorithm".
FUNCTION COMMANDS
The DS2482 understands 9 function commands, which fall into four categories: device control, I²C communication,
1-Wire setup and 1-Wire communication. The feedback path to the host is controlled by a read pointer, which is set
automatically by each function command for the host to efficiently access relevant information. The host processor
sends these commands and applicable parameters as strings of one or two bytes using the I²C interface. The I²C
protocol requires that each byte be acknowledged by the receiving party to confirm acceptance or not be
acknowledged to indicate an error condition (invalid code or parameter) or to end the communication. Details of the
I²C protocol including acknowledge are found in the I²C interface description of this document.
Device Reset
Command Code
Command Parameter
Description
Typical Use
Restriction
Error Response
Command Duration
1-Wire Activity
Read Pointer Position
Status Bits Affected
Configuration Bits Affected
F0h
None
Performs a global reset of device state machine logic, which in turn
selects IO0 as the active 1-Wire channel.
Terminates any ongoing 1-Wire communication.
Device initialization after power-up; re-initialization (reset) as desired.
None (can be executed at any time)
None
Maximum 525ns, counted from falling SCL edge of the command code
acknowledge bit.
Ends maximum 262.5ns after the falling SCL edge of the command code
acknowledge bit.
Status Register (for busy polling)
RST set to 1,
1WB, PPD, SD, SBR, TSB, DIR set to 0
1WS, APU, SPU set to 0
9 of 23
MSR
MSR
of a 1-Wire Single Bit command or the
of the second bit of a 1-Wire Triplet

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