DS21FF42 Maxim Integrated Products, DS21FF42 Datasheet - Page 35

• Manufacturer Part Number: DS21FF42
• Description: IC FRAMER T1 4X4 16CH 300-BGA
• Manufacturer: Maxim Integrated Products

Specifications of DS21FF42

• Controller Type: T1 Framer
• Interface: Parallel/Serial
• Voltage - Supply: 2.97 V ~ 3.63 V
• Current - Supply: 300mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 300-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

CCR1: COMMON CONTROL REGISTER 1 (Address=37 Hex)
PAYLOAD LOOPBACK
When CCR1.1 is set to a one, the DS21Q42 will be forced into Payload LoopBack (PLB). Normally, this
loopback is only enabled when ESF framing is being performed but can be enabled also in D4 framing
applications. In a PLB situation, the DS21Q42 will loop the 192 bits of payload data (with BPVs
corrected) from the receive section back to the transmit section. The FPS framing pattern, CRC6
calculation, and the FDL bits are not looped back, they are reinserted by the DS21Q42. When PLB is
enabled, the following will occur:
1. Data will be transmitted from the TPOS and TNEG pins synchronous with RCLK instead of TCLK
2. All of the receive side signals will continue to operate normally
3. The TCHCLK and TCHBLK signals are forced low
4. Data at the TSER, and TSIG pins is ignored
5. The TLCLK signal will become synchronous with RCLK instead of TCLK
(MSB)
TESE
SYMBOL
TSCLKM
RSCLKM
RSAO
RESE
TESE
ODF
PLB
FLB
ODF
POSITION
CCR1.7
CCR1.6
CCR1.5
CCR1.4
CCR1.3
CCR1.2
CCR1.1
CCR1.0
RSAO
TSCLKM
NAME AND DESCRIPTION
Transmit Elastic Store Enable.
0 = elastic store is bypassed
1 = elastic store is enabled
Output Data Format.
0 = bipolar data at TPOS and TNEG
1 = NRZ data at TPOS; TNEG = 0
Receive Signaling All One’s. This bit should not be enabled
if hardware signaling is being utilized. See Section 14 for
more details.
0 = allow robbed signaling bits to appear at RSER
1 = force all robbed signaling bits at RSER to one
TSYSCLK Mode Select.
0 = if TSYSCLK is 1.544 MHz
1 = if TSYSCLK is 2.048 MHz
RSYSCLK Mode Select.
0 = if RSYSCLK is 1.544 MHz
1 = if RSYSCLK is 2.048 MHz
Receive Elastic Store Enable.
0 = elastic store is bypassed
1 = elastic store is enabled
Payload Loopback.
0 = loopback disabled
1 = loopback enabled
Framer Loopback.
0 = loopback disabled
1 = loopback enabled
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RSCLKM
RESE
PLB
(LSB)
FLB