ISP1161ABM-T ST-Ericsson Inc, ISP1161ABM-T Datasheet - Page 20

• Manufacturer Part Number: ISP1161ABM-T
• Description: IC USB HOST CTRL FULL-SPD 64LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1161ABM-T

• Controller Type: USB 2.0 Controller
• Interface: Parallel
• Voltage - Supply: 3.3V, 5V
• Current - Supply: 47mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Philips Semiconductors
9397 750 13962
Product data
8.6.2 HC’s interrupt output pin (INT1)
To program the four configuration modes of the HC’s interrupt output signal (INT1),
set bits InterruptPinTrigger and InterruptOutputPolarity of the
HcHardwareConfiguration register (20H - read, A0H - write). Bit InterruptPinEnable is
used as the master enable setting for pin INT1.
INT1 has many associated interrupt events, as shown as in
The interrupt events of the HcµPInterrupt register (24H - read, A4H - write) changes
the status of pin INT1 when the corresponding bits of the HcµPInterruptEnable
register (25H - read, A5H - write) and pin INT1’s global enable bit (InterruptPinEnable
of the HcHardwareConfiguration register) are all set to enable status.
However, events that come from the HcInterruptStatus register (03H - read, 83H -
write) affect only the OPR_Reg bit of the HcµPInterrupt register. They cannot directly
change the status of pin INT1.
Fig 19. Interrupt pin operating modes.
Rev. 03 — 23 December 2004
INT
INT
INT
INT
Full-speed USB single-chip host and device controller
Mode 0 level triggered, active LOW
Mode 1 level triggered, active HIGH
Mode 2 edge triggered, active LOW
Mode 3 edge triggered, active HIGH
166 ns
166 ns
INT active
INT active
INT active
INT active
clear or disable INT
clear or disable INT
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Figure
MGT944
ISP1161A
20.
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