MAX17085BETL+T Maxim Integrated Products, MAX17085BETL+T Datasheet - Page 33

• Manufacturer Part Number: MAX17085BETL+T
• Description: Battery Management Dual Main Step-Down Controller
• Manufacturer: Maxim Integrated Products

Specifications of MAX17085BETL+T

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

The total high-side MOSFET power dissipation is:
The optimum high-side MOSFET trades the switching
losses with the conduction (R
input and output voltage ranges. For the charger, the
losses at V
es at V
V
For the low-side MOSFET (N
dissipation always occurs at maximum input voltage:
The following additional loss occurs in the low-side
MOSFET due to the body diode conduction losses:
The total power low-side MOSFET dissipation is:
The DH floating high-side MOSFET drivers are powered
by internal boost switch charge pumps at BST, while the
DL synchronous-rectifier drivers are powered directly by
the 5V bias supply (V
monitor the DL and DH drivers and prevent either FET
from turning on until the other is fully off. The adaptive
driver dead time allows operation without shoot-through
with a wide range of MOSFETs, minimizing delays and
maintaining efficiency.
A low-resistance, low-inductance path from the DL and
DH drivers to the MOSFET gates is used for the adaptive
dead-time circuits to work properly; otherwise, the sense
circuitry in the MAX17085B interprets the MOSFET gates
as “off” while charge actually remains. Use very short,
wide traces (50 mils to 100 mils wide if the MOSFET is
1in from the driver).
Applications with high-input voltages, long inductive
driver trace, and fast rising LX edges may have shoot-
through currents when the low-side MOSFET gate is
IN(MIN)
PD
TOTAL
PD
OUT(MAX )
PD
should be roughly equal to losses at V
COND
TOTAL
(HS) PD
OUT(MIN)
PD
PD
Integrated Charger, Dual Main Step-Down
≈
(LS)
BDY
QRR
Low-Side MOSFET Power Dissipation
(LS) PD
, while for the main SMPS, the losses at
MOSFET Gate Drivers (DH, DL)
______________________________________________________________________________________
=
COND
(LS) 0.05I
(HS)
should be roughly equal to the loss-
≈



1-
DD
=
Controllers, and Dual LDO Regulators
V
=
(HS) PD
). Adaptive dead-time circuits
COND
V
OUT
Q
IN
RR
+
L



PEAK
DS(ON)
), the worst-case power
(LS) PD
×
×
I
V
OUT
2
SW
IN
+
×
×
(HS) PD
) losses over the
2
0.4V
f
SW
×
BDY
R
+
DS(ON)
(LS)
QRR
IN(MAX)
(HS)
.
pulled up by the MOSFET’s gate-to-drain capacitance
(C
following minimum threshold should not be exceeded:
Typically, adding a 4700pF between DL and power
ground (C
greatly reduces coupling. Do not exceed 22nF of total
gate capacitance to prevent excessive turn-off delays.
Alternatively, shoot-through currents may be caused by
a combination of fast high-side MOSFETs and slow low-
side MOSFETs. If the turn-off delay time of the low-side
MOSFET is too long, the high-side MOSFETs can turn on
before the low-side MOSFETs have actually turned off.
Adding a resistor less than 5I in series with B
down the high-side MOSFET turn-on time, eliminating
the shoot-through currents without degrading the turn-
off time (R
MOSFET also reduces the LX node rise time, thereby
reducing EMI and high-frequency coupling responsible
for switching noise.
Figure 7. Gate-Drive Circuit
(R
(C
RSS
BST
NL
)* RECOMMENDED —THE RESISTOR LOWERS EMI BY DECREASING
)* OPTIONAL—THE CAPACITOR REDUCES LX-TO-DL CAPACITIVE
), gate-to-source capacitance (C
MAX17085B
NL
BST
in Figure 7), close to the low-side MOSFETs,
COUPLING THAT CAN CAUSE SHOOT-THROUGH CURRENTS.
in Figure 7). Slowing down the high-side
V
THE SWITCHING NODE RISE TIME.
GS(TH)
LDO5
BST
DH
DL
LX
EP
(R
C
>
BST
BYP
V
)*
IN



C
C
C
(C
RSS
ISS
BST
NL
)*



ISS
N
N
- C
H
L
INPUT (V
RSS
L
ST
). The
slows
IN
)
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