MAX17085BETL+T Maxim Integrated Products, MAX17085BETL+T Datasheet - Page 36

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MAX17085BETL+T

Manufacturer Part Number
MAX17085BETL+T
Description
Battery Management Dual Main Step-Down Controller
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX17085BETL+T

Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Integrated Charger, Dual Main Step-Down
Controllers, and Dual LDO Regulators
U Minimize the main SMPS current-sensing errors by
U When trade-offs in trace lengths must be made, it is
U Route high-speed switching nodes (BST_, LX_, DH_,
U Refer to the MAX17085B evaluation kit for the layout
1) Place the power components first, with ground termi-
36
connecting LX3 and LX5 directly to the drain of the
low-side MOSFET. Minimize the charger current-
sense resistor trace lengths, and ensure accurate
current sensing with Kelvin connections.
preferable to allow the inductor charging path to be
made longer than the discharge path. For example,
it is better to allow some extra distance between the
input capacitors and the high-side MOSFET than to
allow distance between the inductor and the low-side
MOSFET or between the inductor and the output filter
capacitor.
and DL_) away from sensitive analog areas (REF,
VCC, and OUT).
example.
nals adjacent (NL_ source, CIN, and COUT). If pos-
sible, make all these connections on the top layer with
wide, copper-filled areas.
_____________________________________________________________________________________
Layout Procedure
2) Mount the controller IC adjacent to the low-side
3) Group the gate-drive components (BST_ capacitor,
4) Make the DC-DC controller ground connections as
5) Connect the output power planes directly to the out-
6) Use a single-point star ground placed directly below
MOSFET, preferably on the backside opposite NL_
and NH_ to keep LX_, GND, DH_, and the DL_ gate-
drive lines short and wide. The DL_ and DH_ gate
traces must be short and wide (50 mils to 100 mils
wide if the MOSFET is 1in from the controller IC) to
keep the driver impedance low and for proper adap-
tive dead-time sensing.
LDO5 bypass capacitor) together near the controller IC.
shown in Figure 1. This diagram can be viewed as
having two separate ground planes: power ground,
where all the high-power components go, and an ana-
log ground plane for sensitive analog components.
The analog ground plane and power ground plane
must meet only at a single point directly at the IC.
put filter capacitor positive and negative terminals
with multiple vias. Place the entire DC-DC converter
circuit as close to the load as is practical.
the part at the PGND pin. Connect the power ground
(ground plane) and the quiet ground island at this
location.

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