CY7C63833-LFXC Cypress Semiconductor Corp, CY7C63833-LFXC Datasheet - Page 80

• Manufacturer Part Number: CY7C63833-LFXC
• Description: IC USB PERIPHERAL CTRLR 32VQFN
• Manufacturer: Cypress Semiconductor Corp
• Series: CY7Cr

Specifications of CY7C63833-LFXC

• Controller Type: USB Peripheral Controller
• Interface: USB
• Voltage - Supply: 4 V ~ 5.5 V
• Current - Supply: 40mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1001 - ISP 4PORT CYPRESS ENCORE II MCUCY4623 - KIT MOUSE REFERENCE DESIGN428-1774 - EXTENSION KIT FOR ENCORE II428-1773 - KIT DEVELOPMENT ENCORE II
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 428-2258; CY7C63833-LFXC

32. Document History Page
Document 38-08035 Rev. *K
Document Title: CY7C63310, CY7C638xx enCoRe™ II Low Speed USB Peripheral Controller
Document Number: 38-08035
Rev.
*A
*B
*C
*D
*E
*F
**
ECN No.
131323
221881
271232
299179
322053
341277
408017
Change
Orig. of
XGR
BON
BON
BON
KKU
TVR
BHA
TYJ
Submission
See ECN
See ECN
See ECN
See ECN
See ECN
See ECN
12/11/03
Date
New data sheet
Added Register descriptions and package information, changed from advance
information to preliminary
Reformatted. Updated with the latest information
Corrected 24-PDIP pinout typo in
page
page 31,
53. and
(General Purpose IO (GPIO) Ports
42. Corrected
16-pin PDIP package diagram (section
Introduction
is no LVR, only LVD (Low voltage detect). Explained more about LVD and POR.
Changed capture pins from P0.0,P0.1 to P0.5,P0.6.
Table 6-1
as Register names).
Table 9-5
Clock Architecture Description
options from n=0-5,7,8 to n=0-5,7.
Clocking
sources to ITMRCLK, TCAPCLKs. Mentioned P17 is TTL enabled permanently.
Corrected FRT, PIT data write order. Updated INTCLR, INTMSK registers in
the register table also.
DC Characteristics
programmable trip points based on char data. Updated the 50ma sink pins on
638xx, 63903. Keep-alive voltage mentioned corresponding to Keep-alive
current of 20uA. Included Notes regarding VOL,VOH on P1.0,P1.1 and TMDO
spec.
AC Characteristics
Phase to 0.
Pinouts
Removed SCLK and SDATA. Created a separate pinout diagram for the
CY7C63813.
Added the GPIO Block Diagram
Table 10-4
to Hz.
Table 21-1
Corrected V
Updated V
Added footnote to pin description table for D+/D– pins.
Added Typical Values to Low Voltage Detect table.
Corrected Pin label on 16-pin PDIP package.
Corrected minor typos.
Table 5-2
- GPIO port 3
New Assignments: Pin 19 assigned to P3.0 and pin 20 to P3.1
Table 17-7
Table 17-8
Register Summary
INT_MASK0 and address E1 assigned to INT_MASK1
21.
on page 4: Removed the VREG from the CY7C63310 and CY7C63801
Table 15-2
Updated
on page 19: Changed ITMRCLK division to 1,2,3,4. Updated the
Table 17-2
on page 7: Changed table heading (Removed Mnemonics and made
on page 16: Included #of rows for different flash sizes.
on page 6: Corrected pin assignment for the 24-pin QSOP package
IL
on page 23: Changed the Sleep Timer Clock unit from 32 kHz count
on page 58: Added more descriptions to the register.
on page 54: INT_MASK1 changed to 0xE1
on page 55: INT_MASK0 changed to 0xE0
IH
on page 3: Removed Low-voltage reset in last paragraph. There
TTL value.
Figure 28-7.
TTL value in
Table 9-5
on page 69: T
on page 64: Register Summary, address E0 assigned to
on page 41. Added various updates to the GPIO Section
on page 68: changed LVR to LVD included max min
on page 52,
on page 73 and
Description of Change
DC Characteristics
on page 16,
on page 21: Changed CPUCLK selectable
(Figure 14-1.
MDO1
Table 17-4
Table 5-2
on page 33) Corrected
CY7C63310, CY7C638xx
, T
Package Diagrams
Table 10-3
SDO1
Figure 28-8.
on page 6 Added
on page 52,
on page 36)
In description column changed
on page 68.
on page 22,
on page
Table 17-6
Table 15-4
on page 76)
Table 10-1
73.
Table 13-1
Page 80 of 83
Added the
on page
on page
on
on
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