MAX1951ESA+TW Maxim Integrated Products, MAX1951ESA+TW Datasheet - Page 11

• Manufacturer Part Number: MAX1951ESA+TW
• Description: DC/DC Switching Regulators 1MHz 2A 2.6-5.5V PWM DC/DC Step-Down
• Manufacturer: Maxim Integrated Products

Specifications of MAX1951ESA+TW

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

gmc = 4.2S
f
R
fp
fz
For 2µH output inductor, pick the closed-loop unity-gain
crossover frequency (f
power modulator gain at f
then:
Careful PCB layout is critical to achieve clean and sta-
ble operation. The switching power stage requires par-
ticular attention. Follow these guidelines for good PCB
layout:
1) Place decoupling capacitors as close to the IC as
2) Connect input and output capacitors to the power
SWITCH
LOAD
ESR
R
MOD
possible. Keep power ground plane (connected to
PGND) and signal ground plane (connected to
GND) separate.
ground plane; connect all other capacitors to the
signal ground plane.
1
G
= V
MOD(fc)
= [1/(2π xC
= [1/(2 x π × 10 ×10
(60 ×10
= [1/(2π x C
= [1/(2 x π ×10 ×10
= V
O
= 1MHz
C
= (1.5 × 10 × 10
≈ 196pF, choose 220pF, 10%
x K/(gm
OUT
2
= (V
= gmc × R
-6
/I
15.76kHz/200kHz = 0.33
Applications Information
× 0.8 × 0.33) ≈ 51.1kΩ (1%)
OUT(MAX)
OUT
OUT
2A PWM Step-Down DC-to-DC Regulators
EA
______________________________________________________________________________________
OUT
PCB Layout Considerations
x V
× C
R
ESR
1MHz, All-Ceramic, 2.6V to 5.5V Input,
x (R
LOAD
FB
C
OUT
-6
C
-6
= 1.5V/1.5 A = 1Ω
-6
) at 200kHz. Determine the
:
)/(51.1k × 1.5)
)]
x G
LOAD
× 0.01)] = 1.59MHz.
x (1 + 0.01)] = 15.76kHz.
)/(R × I
× fp
MOD(fc)
+ R
MOD
OUT(max)
ESR
/f
) = (1.5 x 0.55)/
C
)]
= 4.2 × 1 ×
)
3) Keep the high-current paths as short and wide as
4) If possible, connect IN, LX, and PGND separately to
5) Ensure all feedback connections are short and
6) Route high-speed switching nodes away from sensi-
The MAX1951 uses a fused-lead 8-pin SO package with
a R
optimized for 1.5A. The typical application circuit shown
in Figure 2c was tested with the existing MAX1951 EV kit
layout at +85°C ambient temperature, and GND lead
temperature was measured at +113°C for a typical
device. The estimated junction temperature was
+138°C. Thermal performance can be further improved
with one of the following options:
1) Increase the copper areas connected to GND, LX,
2) Provide thermal vias next to GND and IN, to the
3) Provide forced-air cooling to further reduce case
possible. Keep the path of switching current (C1 to IN
and C1 to PGND) short. Avoid vias in the switching
paths.
a large copper area to help cool the IC to further
improve efficiency and long-term reliability.
direct. Place the feedback resistors as close to the
IC as possible.
tive analog areas (FB, COMP).
and IN.
ground plane and power plane on the back side of
PCB, with openings in the solder mask next to the
vias to provide better thermal conduction.
temperature.
THJC
rating of 32°C/W. The MAX1951 EV kit layout is
Thermal Considerations
11