PIC16F628A-I/P Microchip Technology Inc., PIC16F628A-I/P Datasheet - Page 23

• Manufacturer Part Number: PIC16F628A-I/P
• Description: 18 PIN, 3.5 KB FLASH, 224 RAM, 16 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F628A-I/P

• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 128 Bytes
• Input Output: 16
• Interface: USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 18-pin PDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 224 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

3.2.2.3
The INTCON register is a readable and writable
register which contains the various enable and flag bits
for all interrupt sources except the comparator module.
See
description of the comparator enable and flag bits.
REGISTER 3-3:
 2003 Microchip Technology Inc.
Section 3.2.2.4
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
INTCON Register
INTCON REGISTER (ADDRESS: 0Bh, 8Bh, 10Bh, 18Bh)
bit 7
GIE: Global Interrupt Enable bit
1 = Enables all unmasked interrupts
0 = Disables all interrupts
PEIE: Peripheral Interrupt Enable bit
1 = Enables all unmasked peripheral interrupts
0 = Disables all peripheral interrupts
T0IE: TMR0 Overflow Interrupt Enable bit
1 = Enables the TMR0 interrupt
0 = Disables the TMR0 interrupt
INTE: RB0/INT External Interrupt Enable bit
1 = Enables the RB0/INT external interrupt
0 = Disables the RB0/INT external interrupt
RBIE: RB Port Change Interrupt Enable bit
1 = Enables the RB port change interrupt
0 = Disables the RB port change interrupt
T0IF: TMR0 Overflow Interrupt Flag bit
1 = TMR0 register has overflowed (must be cleared in software)
0 = TMR0 register did not overflow
INTF: RB0/INT External Interrupt Flag bit
1 = The RB0/INT external interrupt occurred (must be cleared in software)
0 = The RB0/INT external interrupt did not occur
RBIF: RB Port Change Interrupt Flag bit
1 = When at least one of the RB7:RB4 pins changed state (must be cleared in software)
0 = None of the RB7:RB4 pins have changed state
Legend:
R = Readable bit
-n = Value at POR
and
R/W-0
GIE
Section 3.2.2.5
R/W-0
PEIE
for
R/W-0
T0IE
Preliminary
W = Writable bit
’1’ = Bit is set
a
R/W-0
INTE
Note:
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
R/W-0
RBIE
Interrupt flag bits get set when an interrupt
condition occurs regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>).
R/W-0
T0IF
PIC16F62X
x = Bit is unknown
R/W-0
INTF
DS40300C-page 21
R/W-x
RBIF
bit 0