DS90LT012AHMF/NOPB National Semiconductor, DS90LT012AHMF/NOPB Datasheet - Page 5

• Manufacturer Part Number: DS90LT012AHMF/NOPB
• Description: IC RCVR LVDS DIFF RTERM SOT23-5
• Manufacturer: National Semiconductor
• Type: Line Receiverr

Specifications of DS90LT012AHMF/NOPB

• Number Of Drivers/receivers: 0/1
• Protocol: LVDS
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: SOT-23-5, SC-74A, SOT-25
• Number Of Elements: 1
• Number Of Receivers: 1
• Number Of Drivers: 1
• Input Type: CMOS/TTL
• Operating Supply Voltage (typ): 3.3V
• Diff. Input Low Threshold Volt: -100mV
• Propagation Delay Time: 3.5ns
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 5
• Package Type: SOT-23
• Supply Current: 10µA
• Supply Voltage Range: 2.7V To 3.6V
• Driver Case Style: SOT-23
• No. Of Pins: 5
• Operating Temperature Range: -40°C To +85°C
• Device Type: Differential Line Receiver
• Rohs Compliant: Yes
• Data Rate Max: 400Mbps
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DS90LT012AHMF/NOPBTR

Applications Information
reflections and ensure noise is coupled as common-mode.
In fact, we have seen that differential signals which are 1mm
apart radiate far less noise than traces 3mm apart since
magnetic field cancellation is much better with the closer
traces. In addition, noise induced on the differential lines is
much more likely to appear as common-mode which is re-
jected by the receiver.
Match electrical lengths between traces to reduce skew.
Skew between the signals of a pair means a phase differ-
ence between signals which destroys the magnetic field
cancellation benefits of differential signals and EMI will re-
sult! (Note that the velocity of propagation, v = c/E
(the speed of light) = 0.2997mm/ps or 0.0118 in/ps). Do not
rely solely on the autoroute function for differential traces.
Carefully review dimensions to match differential impedance
and provide isolation for the differential lines. Minimize the
number of vias and other discontinuities on the line.
Avoid 90˚ turns (these cause impedance discontinuities).
Use arcs or 45˚ bevels.
Within a pair of traces, the distance between the two traces
should be minimized to maintain common-mode rejection of
the receivers. On the printed circuit board, this distance
should remain constant to avoid discontinuities in differential
impedance. Minor violations at connection points are allow-
able.
FAIL SAFE BIASING
External pull up and pull down resistors may be used to
provide enough of an offset to enable an input failsafe under
open-circuit conditions. This configuration ties the positive
LVDS input pin to VDD thru a pull up resistor and the
negative LVDS input pin is tied to GND by a pull down
resistor. The pull up and pull down resistors should be in the
5kΩ to 15kΩ range to minimize loading and waveform dis-
tortion to the driver. The common-mode bias point ideally
should be set to approximately 1.2V (less than 1.75V) to be
compatible with the internal circuitry. Please refer to applica-
tion note AN-1194, “Failsafe Biasing of LVDS Interfaces” for
more information.
PROBING LVDS TRANSMISSION LINES
Always use high impedance (
(
scope. Improper probing will give deceiving results.
<
2 pF) scope probes with a wide bandwidth (1 GHz)
>
100kΩ), low capacitance
FIGURE 4. VTC of the DS90LT012AH LVDS Receiver
(Continued)
r
where c
5
TERMINATION
The DS90LT012AH integrates the terminating resistor for
point-to-point applications. The resistor value will be be-
tween 90Ω and 133Ω.
THRESHOLD
The LVDS Standard (ANSI/TIA/EIA-644-A) specifies a maxi-
mum threshold of
DS90LV012A and DS90LT012A support an enhanced
threshold region of −100mV to 0V. This is useful for fail-safe
biasing. The threshold region is shown in the Voltage Trans-
fer Curve (VTC) in Figure 4. The typical DS90LT012AH
LVDS receiver switches at about −30mV. Note that with V
= 0V, the output will be in a HIGH state. With an external
fail-safe bias of +25mV applied, the typical differential noise
margin is now the difference from the switch point to the bias
point. In the example below, this would be 55mV of Differ-
ential Noise Margin (+25mV − (−30mV)). With the enhanced
threshold region of −100mV to 0V, this small external fail-
safe biasing of +25mV (with respect to 0V) gives a DNM of a
comfortable 55mV. With the standard threshold region of
+25mV with respect to +100mV or +125mV, giving a DNM of
155mV which is stronger fail-safe biasing than is necessary
for the DS90LT012AH. If more DNM is required, then a
stronger fail-safe bias point can be set by changing resistor
values.
CABLES AND CONNECTORS, GENERAL COMMENTS
When choosing cable and connectors for LVDS it is impor-
tant to remember:
Use controlled impedance media. The cables and connec-
tors you use should have a matched differential impedance
of about 100Ω. They should not introduce major impedance
discontinuities.
Balanced cables (e.g. twisted pair) are usually better than
unbalanced cables (ribbon cable, simple coax) for noise
reduction and signal quality. Balanced cables tend to gener-
ate less EMI due to field canceling effects and also tend to
pick up electromagnetic radiation a common-mode (not dif-
ferential mode) noise which is rejected by the receiver.
For cable distances
work effectively. For distances 0.5M ≤ d ≤ 10M, CAT 3
(category 3) twisted pair cable works well, is readily available
and relatively inexpensive.
±
100mV, the external fail-safe biasing would need to be
±
<
20161629
100mV for the LVDS receiver. The
0.5M, most cables can be made to
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