PIC16F84A-20/P Microchip Technology Inc., PIC16F84A-20/P Datasheet - Page 41
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PIC16F84A-20/P
Manufacturer Part Number
PIC16F84A-20/P
Description
18 PIN, 1.75 KB FLASH, 68 RAM, 13 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F84A-20P.pdf
(88 pages)
Specifications of PIC16F84A-20/P
Cpu Speed
5 MIPS
Eeprom Memory
64 Bytes
Input Output
13
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin PDIP
Programmable Memory
1.75K Bytes
Ram Size
68 Bytes
Speed
20 MHz
Timers
1-8-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F84A-20/P
Manufacturer:
MICROCHI
Quantity:
12 240
Company:
Part Number:
PIC16F84A-20/P
Manufacturer:
MICROCHI
Quantity:
12 240
Company:
Part Number:
PIC16F84A-20/P
Manufacturer:
MICROCHIP
Quantity:
2
DECFSZ
Syntax:
Operands:
Operation:
Status Affected:
Description:
GOTO
Syntax:
Operands:
Operation:
Status Affected:
Description:
INCF
Syntax:
Operands:
Operation:
Status Affected:
Description:
2000 Microchip Technology Inc.
Decrement f, Skip if 0
[ label ] DECFSZ f,d
0
d
(f) - 1
skip if result = 0
None
The contents of register ’f’ are
decremented. If ’d’ is 0, the result
is placed in the W register. If ’d’ is
1, the result is placed back in
register ’f’.
If the result is 1, the next instruc-
tion is executed. If the result is 0,
then a NOP is executed instead,
making it a 2T
Unconditional Branch
[ label ]
0
k
PCLATH<4:3>
None
GOTO is an unconditional branch.
The eleven-bit immediate value is
loaded into PC bits <10:0>. The
upper bits of PC are loaded from
PCLATH<4:3>. GOTO is a two-
cycle instruction.
Increment f
[ label ]
0
d
(f) + 1
Z
The contents of register ’f’ are
incremented. If ’d’ is 0, the result
is placed in the W register. If ’d’ is
1, the result is placed back in
register ’f’.
f
k
[0,1]
f
[0,1]
PC<10:0>
127
127
2047
(destination);
(destination)
GOTO k
INCF f,d
CY
instruction.
PC<12:11>
INCFSZ
Syntax:
Operands:
Operation:
Status Affected:
Description:
IORLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
IORWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Increment f, Skip if 0
[ label ]
0
d
(f) + 1
None
The contents of register ’f’ are
incremented. If ’d’ is 0, the result is
placed in the W register. If ’d’ is 1,
the result is placed back in
register ’f’.
If the result is 1, the next instruc-
tion is executed. If the result is 0,
a NOP is executed instead, making
it a 2T
Inclusive OR W with f
[ label ]
0
d
(W) .OR. (f)
Z
Inclusive OR the W register with
register 'f'. If 'd' is 0, the result is
placed in the W register. If 'd' is 1,
the result is placed back in
register 'f'.
skip if result = 0
Inclusive OR Literal with W
[ label ]
0
(W) .OR. k
Z
The contents of the W register are
OR’ed with the eight-bit literal 'k'.
The result is placed in the W
register.
f
[0,1]
f
[0,1]
k
CY
PIC16F84A
127
127
255
instruction.
(destination),
INCFSZ f,d
IORWF
IORLW k
(W)
(destination)
DS35007B-page 39
f,d