LAN8720AI-CP SMSC, LAN8720AI-CP Datasheet - Page 49

• Manufacturer Part Number: LAN8720AI-CP
• Description: TXRX ETHERNET 10/100 RMII 24QFN
• Manufacturer: SMSC
• Type: Transceiverr

Specifications of LAN8720AI-CP

• Number Of Drivers/receivers: 4/4
• Protocol: RMII
• Voltage - Supply: 1.6 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 24-QFN
• Product: Ethernet Transceivers
• Standard Supported: 802.3, 802.3u
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 1.6 V
• Maximum Operating Temperature: + 85 C
• Ethernet Connection Type: 10/100 Base-T
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 638-1084

Small Footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support
Datasheet
SMSC LAN8720A/LAN8720Ai
4.2.1
BITS
7:0
15
14
13
12
11
10
9
8
Soft Reset
1 = software reset. Bit is self-clearing. When setting this bit do not set other
bits in this register. The configuration (as described in
"MODE[2:0]: Mode Configuration," on page
values, and not from the mode pins.
Loopback
0 = normal operation
1 = loopback mode
Speed Select
0 = 10Mbps
1 = 100Mbps
Note:
Auto-Negotiation Enable
0 = disable auto-negotiate process
1 = enable auto-negotiate process (overrides 0.13 and 0.8)
Power Down
0 = normal operation
1 = General power down mode
Note:
Isolate
0 = normal operation
1 = electrical isolation of PHY from the RMII
Restart Auto-Negotiate
0 = normal operation
1 = restart auto-negotiate process
Note:
Duplex Mode
0 = half duplex
1 = full duplex
Note:
RESERVED
Basic Control Register
Note 4.1
Ignored if Auto-negotiation is enabled (0.12 = 1).
The Auto-Negotiation Enable must be cleared before setting the
Power Down.
Bit is self-clearing.
Ignored if Auto-Negotiation is enabled (0.12 = 1).
Index (In Decimal): 0
The default value of this bit is determined by the MODE[2:0] configuration straps. Refer to
Section 3.7.2, "MODE[2:0]: Mode Configuration," on page 31
DESCRIPTION
DATASHEET
31) is set from the register bit
49
Size:
Section 3.7.2,
16 bits
for additional information.
TYPE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
SC
SC
Revision 1.2 (11-10-10)
DEFAULT
Note 4.1
Note 4.1
Note 4.1
0b
0b
0b
0b
0b
-