PIC24FJ64GA004-I/PT Microchip Technology Inc., PIC24FJ64GA004-I/PT Datasheet - Page 23

• Manufacturer Part Number: PIC24FJ64GA004-I/PT
• Description: MCU, 16-Bit, 44-Pin, 64KB Flash, 8KB RAM, 35 I/O, Nanowatt
• Manufacturer: Microchip Technology Inc.

Specifications of PIC24FJ64GA004-I/PT

• A/d Inputs: 13 Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 35
• Interface: I2C/SPI/UART
• Memory Capacity: 64 Kbytes
• Memory Type: Flash
• Number Of Bits: 16
• Number Of Inputs: 35
• Number Of Pins: 44
• Package Type: 44-pin TQFP
• Programmable Memory: 64K Bytes
• Ram Size: 8K Bytes
• Speed: 32 MHz
• Timers: 5-16-bit
• Voltage, Range: 2-3.6 V
• Voltage, Rating: 2-3.6 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

REGISTER 2-2:
2.3
The PIC24F ALU is 16 bits wide and is capable of addi-
tion, subtraction, bit shifts and logic operations. Unless
otherwise mentioned, arithmetic operations are 2’s
complement in nature. Depending on the operation, the
ALU may affect the values of the Carry (C), Zero (Z),
Negative (N), Overflow (OV) and Digit Carry (DC)
Status bits in the SR register. The C and DC Status bits
operate as Borrow and Digit Borrow bits, respectively,
for subtraction operations.
The ALU can perform 8-bit or 16-bit operations,
depending on the mode of the instruction that is used.
Data for the ALU operation can come from the W
register array, or data memory, depending on the
addressing mode of the instruction. Likewise, output
data from the ALU can be written to the W register array
or a data memory location.
© 2007 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-4
bit 3
bit 2
bit 1-0
Note 1:
U-0
U-0
—
—
Arithmetic Logic Unit (ALU)
User interrupts are disabled when IPL3 = 1.
Unimplemented: Read as ‘0’
IPL3: CPU Interrupt Priority Level Status bit
1 = CPU interrupt priority level is greater than 7
0 = CPU interrupt priority level is 7 or less
PSV: Program Space Visibility in Data Space Enable bit
1 = Program space visible in data space
0 = Program space not visible in data space
Unimplemented: Read as ‘0’
U-0
U-0
—
—
CORCON: CPU CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
U-0
U-0
—
—
PIC24FJ64GA004 FAMILY
U-0
U-0
Preliminary
—
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(1)
IPL3
R/C-0
The PIC24F CPU incorporates hardware support for
both multiplication and division. This includes a dedi-
cated hardware multiplier and support hardware for
16-bit divisor division.
2.3.1
The ALU contains a high-speed, 17-bit x 17-bit
multiplier. It supports unsigned, signed or mixed sign
operation in several multiplication modes:
1.
2.
3.
4.
5.
6.
7.
U-0
—
(1)
16-bit x 16-bit signed
16-bit x 16-bit unsigned
16-bit signed x 5-bit (literal) unsigned
16-bit unsigned x 16-bit unsigned
16-bit unsigned x 5-bit (literal) unsigned
16-bit unsigned x 16-bit signed
8-bit unsigned x 8-bit unsigned
MULTIPLIER
R/W-0
PSV
U-0
—
x = Bit is unknown
U-0
U-0
—
—
DS39881B-page 21
U-0
U-0
—
—
bit 8
bit 0