PIC18F442-I/PT Microchip Technology Inc., PIC18F442-I/PT Datasheet - Page 184
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PIC18F442-I/PT
Manufacturer Part Number
PIC18F442-I/PT
Description
Microcontroller; 16 KB Flash; 768 RAM; 256 EEPROM; 36 I/O; 40-Pin-TQFP
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F442-IPT.pdf
(332 pages)
Specifications of PIC18F442-I/PT
A/d Inputs
8-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
36
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin TQFP
Programmable Memory
16K Bytes
Ram Size
768 Bytes
Speed
40 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F442-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC18FXX2
REGISTER 17-2:
DS39564C-page 182
bit 7
bit 6
bit 5-4
bit 3-0
ADFM: A/D Result Format Select bit
1 = Right justified. Six (6) Most Significant bits of ADRESH are read as ’0’.
0 = Left justified. Six (6) Least Significant bits of ADRESL are read as ’0’.
ADCS2: A/D Conversion Clock Select bit (ADCON1 bits in bold)
Unimplemented: Read as '0'
PCFG3:PCFG0: A/D Port Configuration Control bits
Legend:
R = Readable bit
- n = Value at POR
bit 7
A = Analog input
C/R = # of analog input channels / # of A/D voltage references
<ADCS2>
Note:
ADCON1
PCFG
<3:0>
0000
0001
0010
0011
0100
0101
011x
1000
1001
1010
1011
1100
1101
1110
1111
ADFM
R/W-0
ADCON1 REGISTER
0
0
0
0
1
1
1
1
AN7
On any device RESET, the port pins that are multiplexed with analog functions (ANx) are
forced to be an analog input.
D
D
D
D
D
D
D
D
D
D
D
D
A
A
A
<ADCS1:ADCS0>
ADCS2
R/W-0
ADCON0
AN6
D
D
D
D
D
D
D
D
D
D
D
D
A
A
A
D = Digital I/O
00
01
10
11
00
01
10
11
AN5
D
D
D
D
D
D
D
D
D
A
A
A
A
A
A
W = Writable bit
’1’ = Bit is set
U-0
—
AN4
D
D
D
D
D
D
F
F
F
F
F
F
F
F
A
A
A
A
A
A
A
A
A
OSC
OSC
OSC
RC
OSC
OSC
OSC
RC
(clock derived from the internal A/D RC oscillator)
(clock derived from the internal A/D RC oscillator)
/2
/8
/32
/4
/16
/64
V
V
V
V
V
V
V
V
V
AN3
REF
REF
REF
REF
REF
REF
REF
REF
REF
A
A
A
D
A
D
U-0
—
+
+
+
+
+
+
+
+
+
V
V
V
V
V
AN2
REF
REF
REF
REF
REF
D
D
D
D
A
A
A
A
A
A
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
-
-
-
-
-
PCFG3
R/W-0
Clock Conversion
AN1
D
D
D
A
A
A
A
A
A
A
A
A
A
A
A
AN0
PCFG2
R/W-0
A
A
A
A
A
A
D
A
A
A
A
A
A
A
A
© 2006 Microchip Technology Inc.
V
AN3
AN3
AN3
AN3
AN3
AN3
AN3
AN3
AN3
V
V
V
V
V
REF
—
DD
DD
DD
DD
DD
x = Bit is unknown
+
PCFG1
R/W-0
V
AN2
AN2
AN2
AN2
AN2
V
V
V
V
V
V
V
V
V
REF
—
SS
SS
SS
SS
SS
SS
SS
SS
SS
-
PCFG0
R/W-0
C / R
8 / 0
7 / 1
5 / 0
4 / 1
3 / 0
2 / 1
0 / 0
6 / 2
6 / 0
5 / 1
4 / 2
3 / 2
2 / 2
1 / 0
1 / 2
bit 0
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