PIC16C73A-04/SP Microchip Technology Inc., PIC16C73A-04/SP Datasheet - Page 119

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PIC16C73A-04/SP

Manufacturer Part Number
PIC16C73A-04/SP
Description
28 PIN, 7 KB OTP, 192 RAM, 22 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16C73A-04/SP

A/d Inputs
5-Channel, 8-Bit
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Input Output
22
Interface
I2C/SPI/USART
Memory Type
OTP
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
7K Bytes
Ram Size
192 Bytes
Speed
4 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2.5-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
The ADRES register contains the result of the A/D con-
version. When the A/D conversion is complete, the
result is loaded into the ADRES register, the GO/DONE
bit (ADCON0<2>) is cleared, and A/D interrupt flag bit
ADIF is set. The block diagrams of the A/D module are
shown in Figure 13-3.
After the A/D module has been configured as desired,
the selected channel must be acquired before the con-
version is started. The analog input channels must
have their corresponding TRIS bits selected as an
input. To determine acquisition time, see Section 13.1.
After this acquisition time has elapsed the A/D conver-
sion can be started. The following steps should be fol-
lowed for doing an A/D conversion:
1.
2.
FIGURE 13-3: A/D BLOCK DIAGRAM
1997 Microchip Technology Inc.
Note 1: Not available on PIC16C72/73/73A/76.
Configure the A/D module:
• Configure analog pins / voltage reference /
• Select A/D input channel (ADCON0)
• Select A/D conversion clock (ADCON0)
• Turn on A/D module (ADCON0)
Configure A/D interrupt (if desired):
• Clear ADIF bit
• Set ADIE bit
• Set GIE bit
and digital I/O (ADCON1)
Converter
A/D
(Reference
voltage)
V
REF
(Input voltage)
PCFG2:PCFG0
V
IN
V
DD
001 or
011 or
101
000 or
010 or
100
3.
4.
5.
6.
7.
Wait the required acquisition time.
Start conversion:
• Set GO/DONE bit (ADCON0)
Wait for A/D conversion to complete, by either:
• Polling for the GO/DONE bit to be cleared
OR
• Waiting for the A/D interrupt
Read A/D Result register (ADRES), clear bit
ADIF if required.
For next conversion, go to step 1 or step 2 as
required. The A/D conversion time per bit is
defined as T
required before next acquisition starts.
CHS2:CHS0
111
110
101
100
011
010
001
000
AD
. A minimum wait of 2T
PIC16C7X
DS30390E-page 119
RA1/AN1
RE2/AN7
RA2/AN2
RA0/AN0
RE1/AN6
RE0/AN5
RA5/AN4
RA3/AN3/V
(1)
(1)
(1)
AD
REF
is

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