PIC16C73A-04/SP Microchip Technology Inc., PIC16C73A-04/SP Datasheet - Page 136

• Manufacturer Part Number: PIC16C73A-04/SP
• Description: 28 PIN, 7 KB OTP, 192 RAM, 22 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16C73A-04/SP

• A/d Inputs: 5-Channel, 8-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 22
• Interface: I2C/SPI/USART
• Memory Type: OTP
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 7K Bytes
• Ram Size: 192 Bytes
• Speed: 4 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2.5-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16C7X
TABLE 14-6:
TABLE 14-7:
TABLE 14-8:
DS30390E-page 136
Power-on Reset
MCLR Reset during normal operation
MCLR Reset during SLEEP
WDT Reset
WDT Wake-up
Brown-out Reset
Interrupt wake-up from SLEEP
Legend: u = unchanged, x = unknown, - = unimplemented bit read as '0'.
Note 1: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded
W
INDF
TMR0
PCL
STATUS
FSR
PORTA
PORTB
PORTC
PORTD
PORTE
PCLATH
Legend: u = unchanged,
Note 1: One or more bits in INTCON, PIR1 and/or PIR2 will be affected (to cause wake-up).
POR
Register
0
0
0
1
1
1
1
1
2: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector
3: See Table 14-7 for reset value for specific condition.
with the interrupt vector (0004h).
(0004h).
BOR
x
x
x
0
1
1
1
1
72 73 73A 74 74A 76 77
72 73 73A 74 74A 76 77
72 73 73A 74 74A 76 77
72 73 73A 74 74A 76 77
72 73 73A 74 74A 76 77
72 73 73A 74 74A 76 77
72 73 73A 74 74A 76 77
72 73 73A 74 74A 76 77
72 73 73A 74 74A 76 77
72 73 73A 74 74A 76 77
72 73 73A 74 74A 76 77
72 73 73A 74 74A 76 77
Condition
STATUS BITS AND THEIR SIGNIFICANCE, PIC16C72/73A/74A/76/77
RESET CONDITION FOR SPECIAL REGISTERS
INITIALIZATION CONDITIONS FOR ALL REGISTERS
TO
1
0
x
x
0
0
u
1
Applicable Devices
PD
1
x
0
x
1
0
u
0
x = unknown,
Power-on Reset
Illegal, TO is set on POR
Illegal, PD is set on POR
Brown-out Reset
WDT Reset
WDT Wake-up
MCLR Reset during normal operation
MCLR Reset during SLEEP or interrupt wake-up from SLEEP
Program
Counter
000h
000h
PC + 1
000h
000h
000h
PC + 1
- = unimplemented bit, read as '0', q = value depends on condition
Brown-out Reset
Power-on Reset,
(1)
xxxx xxxx
xxxx xxxx
0001 1xxx
xxxx xxxx
--0x 0000
xxxx xxxx
xxxx xxxx
xxxx xxxx
---- -xxx
---0 0000
0000h
N/A
0001 1xxx
000u uuuu
0001 0uuu
0000 1uuu
uuu0 0uuu
0001 1uuu
uuu1 0uuu
Register
STATUS
MCLR Resets
000q quuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
--0u 0000
uuuu uuuu
uuuu uuuu
uuuu uuuu
---- -uuu
---0 0000
WDT Reset
---- --0-
---- --u-
---- --u-
---- --u-
---- --u-
---- --u-
0000h
PIC16C73/74
Register
N/A
PCON
N/A
(3)
1997 Microchip Technology Inc.
PIC16C72/73A/74A/76/77
Wake-up via WDT
uuuq quuu
---- --0x
---- --uu
---- --uu
---- --uu
---- --uu
---- --u0
---- --uu
uuuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---- -uuu
---u uuuu
Register
Interrupt
PC + 1
PCON
N/A
or
(2)
(3)