DSPIC30F3010-30I/SO Microchip Technology Inc., DSPIC30F3010-30I/SO Datasheet - Page 162
DSPIC30F3010-30I/SO
Manufacturer Part Number
DSPIC30F3010-30I/SO
Description
16 BIT MCU/DSP 28LD 30MIPS 24 KB FLASH
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet
1.DSPIC30F3010-30ISO.pdf
(244 pages)
Specifications of DSPIC30F3010-30I/SO
A/d Inputs
6-Channels, 10-Bit
Cpu Speed
30 MIPS
Eeprom Memory
1K Bytes
Input Output
20
Interface
I2C/SPI/UART, USART
Ios
20
Memory Type
Flash
Number Of Bits
16
Package Type
28-pin SOIC
Programmable Memory
24K Bytes
Ram Size
1K Bytes
Timers
5-16-bit, 2-32-bit
Voltage, Range
2.5-5.5
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
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Manufacturer
Quantity
Price
Part Number:
DSPIC30F3010-30I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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dsPIC30F
Table 21-4 shows the Reset conditions for the RCON
Register. Since the control bits within the RCON regis-
ter are R/W, the information in the table implies that all
the bits are negated prior to the action specified in the
condition column.
TABLE 21-4:
Table 21-5 shows a second example of the bit
conditions for the RCON Register. In this case, it is not
assumed the user has set/cleared specific bits prior to
action specified in the condition column.
TABLE 21-5:
DS70082G-page 160
Power-on Reset
Brown-out Reset
MCLR Reset during normal
operation
Software Reset during
normal operation
MCLR Reset during Sleep
MCLR Reset during Idle
WDT Time-out Reset
WDT Wake-up
Interrupt Wake-up from
Sleep
Clock Failure Trap
Trap Reset
Illegal Operation Trap
Legend:
Note 1:
Power-on Reset
Brown-out Reset
MCLR Reset during normal
operation
Software Reset during
normal operation
MCLR Reset during Sleep
MCLR Reset during Idle
WDT Time-out Reset
WDT Wake-up
Interrupt Wake-up from
Sleep
Clock Failure Trap
Trap Reset
Illegal Operation Reset
Legend:
Note 1:
Condition
Condition
When the wake-up is due to an enabled interrupt, the PC is loaded with the corresponding interrupt vector.
When the wake-up is due to an enabled interrupt, the PC is loaded with the corresponding interrupt vector.
u = unchanged, x = unknown, - = unimplemented bit, read as '0'
u = unchanged, x = unknown, - = unimplemented bit, read as '0'
INITIALIZATION CONDITION FOR RCON REGISTER CASE 1
INITIALIZATION CONDITION FOR RCON REGISTER CASE 2
0x000000
0x000000
0x000000
0x000000
0x000000
0x000000
0x000000
0x000004
0x000000
0x000000
Program
PC + 2
0x000000
0x000000
0x000000
0x000000
0x000000
0x000000
0x000000
0x000004
0x000000
0x000000
Counter
Program
PC + 2
Counter
PC + 2
PC + 2
(1)
(1)
TRAPR IOPUWR EXTR SWR WDTO
TRAPR IOPUWR EXTR SWR WDTO
0
0
0
0
0
0
0
0
0
0
1
0
0
u
u
u
u
u
u
u
u
u
1
u
Preliminary
0
0
0
0
0
0
0
0
0
0
0
1
0
u
u
u
u
u
u
u
u
u
u
1
0
u
1
0
1
1
0
u
u
u
u
u
0
0
1
0
1
1
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
u
0
1
u
u
0
u
u
u
u
u
0
0
0
0
0
0
1
1
0
0
0
0
0
u
0
0
0
0
1
1
u
u
u
u
2004 Microchip Technology Inc.
Idle
Idle
0
0
0
0
0
1
0
0
0
0
0
0
0
u
0
0
0
1
0
u
u
u
u
u
Sleep
Sleep
0
0
0
0
1
0
0
1
1
0
0
0
0
u
0
0
1
0
0
1
1
u
u
u
POR BOR
POR BOR
1
0
0
0
0
0
0
0
0
0
0
0
1
0
u
u
u
u
u
u
u
u
u
u
1
1
0
0
0
0
0
0
0
0
0
0
1
1
u
u
u
u
u
u
u
u
u
u
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