AD53040KRP Analog Devices Inc, AD53040KRP Datasheet - Page 6

• Manufacturer Part Number: AD53040KRP
• Description: IC PIN DRIVER W/INHIBIT 20-PSOP
• Manufacturer: Analog Devices Inc
• Type: Driverr

Specifications of AD53040KRP

• Rohs Status: RoHS non-compliant
• Number Of Drivers/receivers: 1/0
• Voltage - Supply: 12V
• Mounting Type: Surface Mount
• Package / Case: 20-PowerSOP Exposed Top Pad
• Supply Voltage Max: 19V
• No. Of Outputs: 1
• Output Voltage: 8V
• Output Current: 30mA
• Driver Case Style: SOP
• Msl: MSL 1 - Unlimited
• Peak Reflow Compatible (260 C): No
• Device Type: Pin
• Termination Type: SMD
• No. Of Pins: 20
• Rohs Compliant: No
• Protocol: -
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

AD53040
DATA
SMB
SMB
INH
J1
J2
0.01 F
0.01 F
R6
50
C12
R5
50
C13
50
50
2
3
2
3
1
1
8
8
5
5
7
7
C21
0.1 F
C22
0.1 F
MC10EL16
–2V
MC10EL16
–2V
–5.2V
6
–5.2V
6
U1
U2
R4
50
R1
50
R2
50
R3
50
0.1 F
0.1 F
C14
C15
DB15
P1
J4
J5
SMB
SMB
J3
J6
SMB
SMB
1
9
2
10
3
11
4
12
5
13
6
14
7
15
8
Figure 3. Evaluation Board Schematic
50
50
50
50
+
C4
1 F
JP2
JP3
JP1
TP
TP
TP
1
1
1
C7
1 F
GND
+V
–V
S
S
–6–
0.1 F
C1
C6
1 F
V
LOW
V
C5
1 F
HIGH
THERM
NOTE:
C2
0.1 F
TV
PWR
GND
C8
0.1 F
1. 50
2. NO VIAS ALLOWED ON VOUT LINE.
3. SMA ON V
4. ONE DIMENSION OF BOARD TO BE 4-1/2 INCHES.
5. DUT PACKAGE IS TO BE CENTERED ON BOARD.
6. ALL RESISTORS AND NONELECTROLYTIC CAPS ARE
7. SEE DATA SHEET FOR HIDDEN POWER AND GROUND PINS
8. ALL 100nF BYPASS CAPACITORS TO BE LOCATED CLOSE
9. PCB IS TO BE 4-LAYER WITH POWER GND (
CC
V
THERM
–V
–2V
V
–5.2V
+V
TH
VH
VL
DATA
INH
LOW
HIGH
IMPEDANCE MATCH.
0805-SIZE SURFACE MOUNT.
TO PACKAGE.
INNER PLANES.
AS POSSIBLE. (END OF TRACE MARKED BY *). THROUGH
SMA CONNECTS BETWEEN MC10EL16 OUTPUTS AND DUT.
ON LOGIC GATES.
S
S
AD53040
TERMINATION TO BE AS CLOSE TO RECEIVER
HQG1
U 3
–V
S
–V
+V
OUT
+V
C9
0.1 F
S
S
S
V
TO BE MOUNTED ON ITS SIDE FOR BEST
EE
IL+
IL–
C16
0.039 F
C10
0.1 F
G2H
G2L
C19
0.1 F
V
50
–5.2V
OUT
R7
C17
0.039 F
C3
0.1 F
C11
0.1 F
50
V
CC
C18
5pF
) AND –2V AS
SIDESMB
SIDESMB
J7
J8
REV. B
GND
V
TEST_LD
OUT