BU2152FS-E2 Rohm Semiconductor, BU2152FS-E2 Datasheet - Page 7

• Manufacturer Part Number: BU2152FS-E2
• Description: IC DRVR SER/PAR I/O 24B SSOPA32
• Manufacturer: Rohm Semiconductor
• Type: Driverr

Specifications of BU2152FS-E2

• Voltage - Supply: 2.7 V ~ 5.5 V
• Mounting Type: Surface Mount
• Package / Case: 32-SSOP
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 25 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Protocol: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: BU2152FS-E2; BU2152FS-E2TR

【BU2050F】
●Pin descriptions
●Timing chart
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1. After the power is turned on and the voltage is stabilized, STB should be activated, after clocking 8 data bits into the
2. Pn parallel output data of the shift register is set after the 8
3. Since the STB is level latch, data is retained in the “L” section and renewed in the “H” section of the STB.
［Function explanation］
CLK
DATA
CLR
STB
Pn
Pin No.
DATA pin.
10
11
12
13
14
1
2
3
4
5
6
7
8
9
・ A latch circuit has the reset function, which is common in all bits. In case of CLR terminal is “L”, the latch
・ A serial data inputted from DATA terminal is read in shift register with synchronized rising of clock.
Pin Name
circuit is reset non-synchronously without the other input condition, and all parallel output can be “L”.
In case of STB is “L” (CLR is ”H”), transmit the data which read in the shift register to latch circuit, and
outputs from the parallel data output terminal (P1～P8).
In case of STB is “H”, all parallel outputs and the data of latch do not change.
DATA8
DATA
CLR
CLK
STB
V
V
P3
P4
P5
P6
P7
P8
P1
P2
SS
DD
DATA7
Parallel Data Output
GND
Parallel Data Output
Clock Signal Input
Strobe Signal Input
In case of “L”, the data of shift register outputs.
In case of “H”, all parallel outputs and data of latch circuit do not change.
Reset Signal Input
In case of “L”, the data of latch circuit reset, and all parallel output (P1～P8) can be L.
Normally CLR=H
Parallel Data output
Power Supply
Serial Data Input
DATA6
Previous DATA
Fig. 2
7/24
th
clock by the STB.
Function
DATA2
DATA1
DATA
Technical Note
2009.06 - Rev.A
“L”