PIC16C74B-20I/P Microchip Technology Inc., PIC16C74B-20I/P Datasheet - Page 50
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PIC16C74B-20I/P
Manufacturer Part Number
PIC16C74B-20I/P
Description
40 PIN, 7 KB OTP, 192 RAM, 33 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16C74B-20IP.pdf
(184 pages)
Specifications of PIC16C74B-20I/P
A/d Inputs
8-Channel, 8-Bit
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Input Output
33
Interface
I2C/SPI/USART
Memory Type
OTP
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
7K Bytes
Ram Size
192 Bytes
Speed
4 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2.5-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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PIC16C63A/65B/73B/74B
REGISTER 9-1:
DS30605C-page 50
bit 7-6
bit 5-4
bit 3-0
CCP1CON REGISTER/CCP2CON REGISTER
bit 7
Unimplemented: Read as '0'
CCPxX:CCPxY: PWM Least Significant bits
Capture mode:
Unused
Compare mode:
Unused
PWM mode:
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPRxL.
CCPxM3:CCPxM0: CCPx Mode Select bits
0000 = Capture/Compare/PWM disabled (resets CCPx module)
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, set output on match (CCPxIF bit is set)
1001 = Compare mode, clear output on match (CCPxIF bit is set)
1010 = Compare mode, generate software interrupt on match (CCPxIF bit is set, CCPx pin is
1011 = Compare mode, trigger special event (CCPxIF bit is set, CCPx pin is unaffected);
11xx = PWM mode
Legend:
R = Readable bit
-n = Value at POR
U-0
—
unaffected)
CCP1 resets TMR1; CCP2 resets TMR1 and starts an A/D conversion (if A/D module
is enabled)
U-0
—
CCPxX
R/W-0
W = Writable bit
’1’ = Bit is set
CCPxY
R/W-0
CCPxM3
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
R/W-0
CCPxM2 CCPxM1 CCPxM0
R/W-0
2000 Microchip Technology Inc.
x = Bit is unknown
R/W-0
R/W-0
bit 0
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