PIC16F1827-I/SS Microchip Technology Inc., PIC16F1827-I/SS Datasheet - Page 335
![no-image](/images/manufacturer_photos/0/4/440/microchip_technology_inc__sml.jpg)
PIC16F1827-I/SS
Manufacturer Part Number
PIC16F1827-I/SS
Description
20 SSOP .209in TUBE, 7 KB Flash, 384 bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhance
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F1826-ISO.pdf
(406 pages)
Specifications of PIC16F1827-I/SS
A/d Inputs
12-Channel, 10-Bit
Comparators
2
Cpu Speed
8 MIPS
Eeprom Memory
256 Bytes
Input Output
16
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin SSOP
Programmable Memory
7K Bytes
Ram Size
384 Bytes
Speed
32 MHz
Timers
4-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
Standby Current (pic16lf182x)
30 nA @ 1.8 V, Typical
Lead Free Status / Rohs Status
RoHS Compliant part
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F1827-I/SS
Manufacturer:
NELL
Quantity:
45
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MOVWI
Syntax:
Operands:
Operation:
Status Affected:
Description:
2011 Microchip Technology Inc.
Mode
Preincrement
Predecrement
Postincrement
Postdecrement
Move W to INDFn
[ label ] MOVWI ++FSRn
[ label ] MOVWI --FSRn
[ label ] MOVWI FSRn++
[ label ] MOVWI FSRn--
[ label ] MOVWI k[FSRn]
n [0,1]
mm [00,01, 10, 11]
-32 k 31
W INDFn
Effective address is determined by
• FSR + 1 (preincrement)
• FSR - 1 (predecrement)
• FSR + k (relative offset)
After the Move, the FSR value will be
either:
• FSR + 1 (all increments)
• FSR - 1 (all decrements)
Unchanged
This instruction is used to move data
between W and one of the indirect
registers (INDFn). Before/after this
move, the pointer (FSRn) is updated by
pre/post incrementing/decrementing it.
Note: The INDFn registers are not
physical registers. Any instruction that
accesses an INDFn register actually
accesses the register at the address
specified by the FSRn.
FSRn is limited to the range 0000h -
FFFFh. Incrementing/decrementing it
beyond these bounds will cause it to wrap
around.
The increment/decrement operation on
FSRn WILL NOT affect any Status bits.
None
Syntax
FSRn++
FSRn--
++FSRn
--FSRn
mm
00
01
10
11
NOP
Syntax:
Operands:
Operation:
Status Affected:
Description:
Words:
Cycles:
Example:
OPTION
Syntax:
Operands:
Operation:
Status Affected:
Description:
Words:
Cycles:
Example:
RESET
Syntax:
Operands:
Operation:
Status Affected:
Description:
PIC16(L)F1826/27
Load OPTION_REG Register
with W
[ label ] OPTION
None
(W) OPTION_REG
None
Move data from W register to
OPTION_REG register.
1
1
OPTION
Before Instruction
After Instruction
Software Reset
[ label ] RESET
None
Execute a device Reset. Resets the
nRI flag of the PCON register.
None
This instruction provides a way to
execute a hardware Reset by soft-
ware.
No Operation
[ label ]
None
No operation
None
No operation.
1
1
NOP
OPTION_REG = 0xFF
OPTION_REG = 0x4F
NOP
DS41391D-page 335
W = 0x4F
W = 0x4F
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