PIC16F74-I/L Microchip Technology Inc., PIC16F74-I/L Datasheet - Page 57

• Manufacturer Part Number: PIC16F74-I/L
• Description: 44 PIN, 7 KB FLASH, 192 RAM, 33 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F74-I/L

• A/d Inputs: 8-Channel, 8-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 33
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 44-pin PLCC
• Programmable Memory: 7K Bytes
• Ram Size: 192 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

8.3
In Capture mode, CCPR1H:CCPR1L captures the
16-bit value of the TMR1 register when an event occurs
on pin RC2/CCP1. An event is defined as one of the fol-
lowing and is configured by CCPxCON<3:0>:
• Every falling edge
• Every rising edge
• Every 4th rising edge
• Every 16th rising edge
An event is selected by control bits CCP1M3:CCP1M0
(CCP1CON<3:0>). When a capture is made, the inter-
rupt request flag bit CCP1IF (PIR1<2>) is set. The
interrupt flag must be cleared in software. If another
capture occurs before the value in register CCPR1 is
read, the old captured value is overwritten by the new
captured value.
8.3.1
In Capture mode, the RC2/CCP1 pin should be config-
ured as an input by setting the TRISC<2> bit.
FIGURE 8-1:
8.3.2
Timer1 must be running in Timer mode or Synchro-
nized Counter mode for the CCP module to use the
capture feature. In Asynchronous Counter mode, the
capture operation may not work.
8.3.3
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep bit
CCP1IE (PIE1<2>) clear to avoid false interrupts and
should clear the flag bit CCP1IF following any such
change in operating mode.
 2002 Microchip Technology Inc.
RC2/CCP1
pin
Note:
Capture Mode
Edge Detect
If the RC2/CCP1 pin is configured as an
output, a write to the port can cause a
capture condition.
Q’s
CCP PIN CONFIGURATION
Prescaler
÷ 1, 4, 16
TIMER1 MODE SELECTION
SOFTWARE INTERRUPT
and
CCP1CON<3:0>
Set Flag bit CCP1IF
CAPTURE MODE
OPERATION BLOCK
DIAGRAM
(PIR1<2>)
Capture
Enable
CCPR1H
TMR1H
CCPR1L
TMR1L
8.3.4
There are four prescaler settings, specified by bits
CCP1M3:CCP1M0. Whenever the CCP module is
turned off, or the CCP module is not in Capture mode,
the prescaler counter is cleared. Any RESET will clear
the prescaler counter.
Switching from one capture prescaler to another may
generate an interrupt. Also, the prescaler counter will
not be cleared, therefore, the first capture may be from
a non-zero prescaler. Example 8-1 shows the recom-
mended method for switching between capture pres-
calers. This example also clears the prescaler counter
and will not generate the “false” interrupt.
EXAMPLE 8-1:
8.4
In Compare mode, the 16-bit CCPR1 register value is
constantly compared against the TMR1 register pair
value. When a match occurs, the RC2/CCP1 pin is:
• Driven high
• Driven low
• Remains unchanged
The action on the pin is based on the value of control
bits CCP1M3:CCP1M0 (CCP1CON<3:0>). At the
same time, interrupt flag bit CCP1IF is set.
FIGURE 8-2:
CLRF
MOVLW
MOVWF
RC2/CCP1
Special Event Trigger will:
• clear TMR1H and TMR1L registers
• NOT set interrupt flag bit TMR1F (PIR1<0>)
• (for CCP2 only) set the GO/DONE bit (ADCON0<2>)
Pin
Output Enable
TRISC<2>
Compare Mode
CCP1CON
NEW_CAPT_PS ;Load the W reg with
CCP1CON
CCP PRESCALER
Q
Special Event Trigger
CCP1CON<3:0>
R
S
Mode Select
Output
CHANGING BETWEEN
CAPTURE PRESCALERS
COMPARE MODE
OPERATION BLOCK
DIAGRAM
Logic
;Turn CCP module off
;the new prescaler
;move value and CCP ON
;Load CCP1CON with this
;value
Set Flag bit CCP1IF
(PIR1<2>)
PIC16F7X
Match
DS30325B-page 55
CCPR1H CCPR1L
TMR1H
Comparator
TMR1L