PIC16F628-20I/P Microchip Technology Inc., PIC16F628-20I/P Datasheet - Page 98
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PIC16F628-20I/P
Manufacturer Part Number
PIC16F628-20I/P
Description
18 PIN, 3.5 KB FLASH, 224 RAM, 16 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F628-20IP.pdf
(170 pages)
Specifications of PIC16F628-20I/P
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
128 Bytes
Input Output
16
Interface
SCI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin PDIP
Programmable Memory
3.5K Bytes
Ram Size
224 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F628-20I/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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PIC16F62X
14.5
14.5.1
The on-chip POR circuit holds the chip in RESET until
V
operation. To take advantage of the POR, just tie the
MCLR pin through a resistor to V
external RC components usually needed to create
Power-on Reset. A maximum rise time for V
required. See Electrical Specifications for details.
The POR circuit does not produce an internal RESET
when V
When the device starts normal operation (exits the
RESET condition), device operating parameters (volt-
age, frequency, temperature, etc.) must be met to
ensure operation. If these conditions are not met, the
device must be held in RESET until the operating
conditions are met.
For additional information, refer to Application Note
AN607, “Power-up Trouble Shooting”.
14.5.2
The PWRT provides a fixed 72 ms (nominal) timeout
on power-up only, from POR or Brown-out Detect
Reset. The PWRT operates on an internal RC oscilla-
tor. The chip is kept in RESET as long as PWRT is
active. The PWRT delay allows the V
acceptable level. A configuration bit, PWRTE can
disable (if set) or enable (if cleared or programmed) the
PWRT. The PWRT should always be enabled when
Brown-out Detect Reset is enabled.
FIGURE 14-7:
DS40300C-page 96
DD
has reached a high enough level for proper
DD
Power-on Reset (POR), Power-up
Timer (PWRT), Oscillator Start-up
Timer (OST) and Brown-out Detect
(BOD)
declines.
POWER-ON RESET (POR)
POWER-UP TIMER (PWRT)
INTERNAL
INTERNAL
INTERNAL
RESET
RESET
RESET
V
V
V
DD
DD
DD
BROWN-OUT SITUATIONS
DD
. This will eliminate
DD
≥ T
to rise to an
BOD
DD
Preliminary
is
<72 MS
72 MS
The Power-Up Time delay will vary from chip to chip
and due to V
See DC parameters for details.
14.5.3
The OST provides a 1024 oscillator cycle (from OSC1
input) delay after the PWRT delay is over. This ensures
that the crystal oscillator or resonator has started and
stabilized.
The OST timeout is invoked only for XT, LP and HS
modes and only on Power-on Reset or wake-up from
SLEEP.
14.5.4
The PIC16F62X members have on-chip BOD circuitry.
A configuration bit, BODEN, can disable (if clear/
programmed) or enable (if set) the BOD Reset circuitry.
If V
brown-out situation will RESET the chip. A RESET is
not guaranteed to occur if V
shorter than T
Table 17-1 and Table 17-6, respectively.
On any RESET (Power-on, Brown-out, Watchdog, etc.)
the chip will remain in RESET until V
V
keep the chip in RESET an additional 72 ms.
If V
running, the chip will go back into a Brown-out Detect
Reset and the Power-up Timer will be re-initialized.
Once V
execute a 72 ms RESET. The Power-up Timer should
always be enabled when Brown-out Detect is enabled.
Figure 14-7 shows typical Brown-out situations.
BOD
72 MS
72 MS
DD
DD
. The Power-up Timer will now be invoked and will
drops below V
DD
falls below V
rises above V
OSCILLATOR START-UP TIMER
(OST)
BROWN-OUT DETECT (BOD)
RESET
DD
BOD
, temperature and process variation.
. V
BOD
BOD
BOD
2003 Microchip Technology Inc.
BOD
while the Power-up Timer is
for longer than T
and T
V
V
V
, the Power-Up Timer will
DD
BOD
BOD
BOD
falls below V
BOD
DD
are defined in
rises above
BOD
BOD
, the
for
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