PIC18F252-I/SO Microchip Technology Inc., PIC18F252-I/SO Datasheet - Page 153
PIC18F252-I/SO
Manufacturer Part Number
PIC18F252-I/SO
Description
Microcontroller; 32 KB Flash; 1536 RAM; 256 EEPROM; 25 I/O; 28-Pin-SOIC
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F252-ISO.pdf
(332 pages)
Specifications of PIC18F252-I/SO
A/d Inputs
5-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
25
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SOIC
Programmable Memory
32K Bytes
Ram Size
1.5K Bytes
Speed
40 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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15.4.7
In I
reload value is placed in the lower 7 bits of the
SSPADD register (Figure 15-17). When a write occurs
to SSPBUF, the baud rate generator will automatically
begin counting. The BRG counts down to 0 and stops
until another reload has taken place. The BRG count is
decremented twice per instruction cycle (T
Q2 and Q4 clocks. In I
reloaded automatically.
FIGURE 15-17:
TABLE 15-3:
© 2006 Microchip Technology Inc.
Note 1: The I
2
C Master mode, the baud rate generator (BRG)
2: Actual frequency will depend on bus conditions. Theoretically, bus conditions will add rise time and extend
10 MHz
10 MHz
10 MHz
4 MHz
4 MHz
4 MHz
1 MHz
1 MHz
1 MHz
BAUD RATE GENERATOR
100 kHz) in all details, but may be used with care where higher rates are required by the application.
low time of clock period, producing the effective frequency.
F
CY
2
I
2
C interface does not conform to the 400 kHz I
C CLOCK RATE W/BRG
BAUD RATE GENERATOR BLOCK DIAGRAM
SSPM3:SSPM0
2
C Master mode, the BRG is
SCL
SSPM3:SSPM0
20 MHz
20 MHz
20 MHz
8 MHz
8 MHz
8 MHz
2 MHz
2 MHz
2 MHz
F
CY
CY
*2
) on the
Control
Reload
CLKO
Reload
Once the given operation is complete (i.e., transmis-
sion of the last data bit is followed by ACK), the internal
clock will automatically stop counting and the SCL pin
will remain in its last state.
Table 15-3 demonstrates clock rates based on
instruction cycles and the BRG value loaded into
SSPADD.
BRG Down Counter
2
C specification (which applies to rates greater than
SSPADD<6:0>
BRG Value
0Dh
3Fh
0Ah
0Ah
19h
20h
28h
03h
00h
PIC18FXX2
Fosc/4
(2 Rollovers of BRG)
400 kHz
400 kHz
333 kHz
312.5 kHz
DS39564C-page 151
1 MHz
100 kHz
308 kHz
100 kHz
100kHz
F
SCL (2)
(1)
(1)
(1)
(1)
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