ATA6628-PGPW Atmel, ATA6628-PGPW Datasheet
ATA6628-PGPW
Specifications of ATA6628-PGPW
Related parts for ATA6628-PGPW
ATA6628-PGPW Summary of contents
Page 1
... SAEJ2602-2 specifications. It has a low-drop voltage regulator for 3.3V/85mA output and a window watchdog. The Atmel ATA6630 has the same func- tionality as the Atmel ATA6628; however, it uses a 5V/85mA regulator. The voltage regulator is able to source up to 85mA, but the output current can be boosted by using an external NPN transistor ...
Page 2
... RXD 4 WAKE 17 Edge KL_15 Detection PVCC 12 TXD Time-out Timer SP_MODE Speed 8 DIV_ON 1 VBATT Atmel ATA6628/ATA6630 2 Mode Receiver Wake-up Bus Timer Slew Rate Control TXD Control Unit High Mode Watchdog PVCC GND Normal and Fail-safe Mode RF Filter Short Circuit and Overtemperature ...
Page 3
... VCC 19 VCC 3.3V/5V regulator output/driver pin, connect to PVCC 20 VS Battery supply Backside Heat slug is connected to GND 9117G–AUTO–03/ VBATT 1 15 Atmel ATA6628/30 QFN 5mm x 5mm NTRIG 3 13 0.65mm pitch 20 lead WAKE 4 12 GND Atmel ATA6628/ATA6630 TM WD_OSC NRES TXD INH 3 ...
Page 4
... Atmel ATA6628/ATA6630 27V. An undervoltage detection is implemented to S falls below VS S ® ATA6628/ATA6630 does not affect the LIN Bus in the event of GND disconnec boost up the maximum load current, an external NPN transistor may be thun in order to avoid false bus messages. After th 9117G–AUTO–03/11 ...
Page 5
... Connect the MODE pin directly or via an external resistor to GND for normal watchdog opera- tion. To debug the software of the connected microcontroller, connect MODE pin to PVCC and the watchdog is switched off. Note: 9117G–AUTO–03/11 If you do not use the watchdog, connect pin MODE directly to PVCC. Atmel ATA6628/ATA6630 typ. 35µA. The VS , the DOM = 0V). ...
Page 6
... Wake-up Events from Sleep or Silent Mode • LIN-bus • WAKE pin • EN pin • KL_15 Atmel ATA6628/ATA6630 possible to switch the IC into Sleep or Silent Mode. Connect the Batt . To protect this pin against voltage transients, a serial resistor of 47k and a KL_15 and, therefore, the sensitivity against transients on the ignition KL_15. ...
Page 7
... SP_MODE pin to low. 9117G–AUTO–03/11 Figure 9-2 on page Table of Voltage Divider Mode of Operation Fail-safe/Normal/ High-speed/Silent Sleep Atmel ATA6628/ATA6630 Table 3-1 on page 7 switched on if DIV_ON via a 47 resistor in series and Battery 31). The divider ratio is 1:6. ratio. The PV output pin is Battery ...
Page 8
... Table 4-1. Table of Modes Mode of Operation Transceiver Unpowered Off Fail-safe Off Normal/ On TXD depending High-speed Silent Off Sleep Off Atmel ATA6628/ATA6630 8 Unpowered Mode (See Section 4. Fail-safe Mode VCC: 3.3V/5V b with undervoltage monitoring Communication: OFF e Watchdog silent command TXD = normal command ...
Page 9
... VCC regulator output current I Switch to Silent Mode Normal Mode EN Mode select window TXD t = 3.2µs d NRES VCC Delay time silent mode t _silent = maximum 20µs d LIN LIN switches directly to recessive mode Atmel ATA6628/ATA6630 Figure 4-2 on page 9). The transmission is a combination of the Batt . VCC Silent Mode 9 ...
Page 10
... Figure 4-3. LIN bus Watchdog VCC voltage regulator NRES Atmel ATA6628/ATA6630 10 ) and the following rising edge at the LIN pin (see bus Figure 4-3 on page 10). EN high can be used to switch directly to Normal Mode. LIN Wake-up from Silent Mode Bus wake-up filtering time ...
Page 11
... V is typically 10µA. Batt Switch to Sleep Mode Normal Mode EN Mode select window TXD t = 3.2µs d NRES VCC Delay time sleep mode t = maximum 20µs d_sleep LIN LIN switches directly to recessive mode Atmel ATA6628/ATA6630 (Figure 4-4 on page 11). In order to avoid any Sleep Mode 11 ...
Page 12
... IC switches to the Normal Mode. Figure 4-5. LIN bus RXD TXD VCC voltage regulator NRES Watchdog Atmel ATA6628/ATA6630 12 ) and a rising edge at pin LIN result in a remote wake-up request. The device bus Figure 4-5 on page 12). LIN Wake Up from Sleep Mode Bus wake-up filtering time t bus ...
Page 13
... I VSsleep ), the IC will stay in sleep respectively silent mode (see Floating LIN-bus During Sleep or Silent Mode V LINL V BUSdom VSsleep/silent Sleep/Silent Mode Wake-up Detection Phase Atmel ATA6628/ATA6630 in sleep or silent mode during voltage levels VS respectively dominant state is reached VSsilent Figure 4-6). t mon I VSsleep_short / I I ...
Page 14
... If the ATA6628/ATA6630 is in Sleep or Silent Mode and the voltage level at the LIN-bus is in dominant state (V for example), the IC switches back to Sleep Mode respectively Silent Mode. The V consumption then VSsilent 4-7 on page Figure 4-7. LIN BUS Mode of operation Int. Pull-up Resistor RLIN ...
Page 15
... TXD, RXD Depending from Operation Modes Signalling fail-safe sources (see Signalling Fail-safe Sources (battery) undervoltage detection Signalling in Fail-safe Mode after Reset (NRES was Low), Shows the Reset Source at TXD and RXD Pins Atmel ATA6628/ATA6630 19). The NRES output remains low for t 4-2. TXD Table 4-3 and ...
Page 16
... This allows very fast data transmission up to 200kBaud, e.g., for electronic control (ECU) tests and microcontroller program or data download. In this mode superior EMC performance is not guaranteed. Atmel ATA6628/ATA6630 16 Figure 5-1 on page , the IC mode changes from Unpowered Mode to Fail-safe Mode. ...
Page 17
... LIN result in a remote wake-up request. A remote BUS ) results in a local wake-up request. The device switches to Fail-safe Mode. The inter- 12) and the Normal mode. Atmel ATA6628/ATA6630 at the LIN pin activates the internal LIN LINL maintained for a certain ...
Page 18
... If the resistor at the WD_OSC pin is disconnected and the NTRIG Signal has a period time < 46ms a reset is guaranteed. • If there is no NTRIG signal and a short-circuit at WD_OSC to GND the NRES switches to low after 90ms. For an open circuit (no resistor) at WD_OSC it switches to low after 390ms. Atmel ATA6628/ATA6630 18 , the output limits the output current to I Battery ...
Page 19
... Power Dissipation: Safe Operating Area: VCC Output Current versus Supply Voltage V at Different Ambient Temperatures Due Pin of the system basis chip is disconnected. This will not affect S Atmel ATA6628/ATA6630 the safe operating area of the Atmel T res_f = 35K/W thja Tamb = 105°C Tamb = 115°C Tamb = 125° which is VCC ® ...
Page 20
... If the triggering signal fails in this open window t will be drawn to ground. A triggering signal during the closed window t NRES to low. Atmel ATA6628/ATA6630 20 > 200ns triggering signal is not received, a reset signal will be generated at output starts with the negative edge of the RXD output. ...
Page 21
... Closed Period Time Window t /µs t /ms t /ms osc d 1 13.3 105 14.0 19.61 154.8 20.64 33.54 264.80 35.32 42.84 338.22 45.11 Atmel ATA6628/ATA6630 Watchdog Reset and t can also vary by 20 calculated as follows. wd and the minimum 24.8ms 26ms 2 Trigger Period Open Window ...
Page 22
... ANSI/ESD-STM5.1 JESD22-A114 AEC-Q100 (002) MIL-STD-883 (M3015.7) CDM ESD STM 5.3.1 MM ESD EIA/JESD22-A115 ESD STM5.2 AEC-Q100 (002) ESD HBM following STM5.1 with 1.5k 100pF - Pin VS, LIN, KL_15, WAKE to GND Junction temperature Storage temperature Atmel ATA6628/ATA6630 22 Symbol Min. V –0 –1 –150 –0.3 –27 – ...
Page 23
... Without load at VCC Bus recessive V < 14V load current 50mA CC Bus recessive, RXD is low V < 14V S Without load at VCC for ATA6628 VS for ATA6630 VS Switch to Unpowered Mode VS Switch to Fail-safe Mode VS VS Atmel ATA6628/ATA6630 Typ. Max 165 170 165 170 10 Symbol Min. Typ. Max VSsleep I 3 ...
Page 24
... Switch-on resistance between 7.2 VS and INH 7.3 Leakage current 8 LIN Bus Driver Driver recessive output 8.1 voltage 8.2 Driver dominant voltage *) Type means 100% tested 100% correlation tested Characterized on samples Design parameter Atmel ATA6628/ATA6630 24 Test Conditions Pin Normal Mode RXD LIN V = 0.4V ...
Page 25
... LIN V = BUS_CNT LIN ( )/2 th_dom th rec LIN LIN – V LIN hys th_rec th_dom LIN Activates the LIN receiver LIN Atmel ATA6628/ATA6630 Symbol Min. Typ. Max. V _HiSUP V 0.6 _LoSUP_1k V 0.8 _HiSUP_1k LIN V 0.4 SerDiode I 70 120 200 BUS_LIM I –1 –0.35 BUS_PAS_dom I 10 BUS_PAS_rec I – ...
Page 26
... Duty cycle 1 10.8 Duty cycle 2 10.9 Duty cycle 3 10.10 Duty cycle 4 Slope time falling and rising 10.11 edge at LIN *) Type means 100% tested 100% correlation tested Characterized on samples Design parameter Atmel ATA6628/ATA6630 26 Test Conditions Pin LIN LIN V ...
Page 27
... S KL_15 V = 27V KL_15 Without external capacitor KL_15 R = 47k , C = 100nF KL_15 V WAKE Initializes a wake-up signal WAKE V < 27V WAKE S WAKE V = 27V 27V WAKE S WAKE Atmel ATA6628/ATA6630 Symbol Min. Typ. Max. RXD t 6 rx_pd t –2 +2 rx_sym V 0.14 NRESL V 0.14 NRESLL reset t 1.5 10 res_f – ...
Page 28
... No. Parameters Time of low pulse for wake-up 16.5 via WAKE pin 17 VCC Voltage Regulator ATA6628 in Normal/Fail-safe and Silent Mode, VCC and PVCC Short-circuited 17.1 Output voltage VCC 17.2 Output voltage VCC at low VS 3V < V 17.3 Regulator drop voltage 17.4 Regulator drop voltage 17 ...
Page 29
... LIN Driver in High-speed Mode(VSP_Mode = VCC) 21.1 Transmission Baud rate 21.2 Slope time LIN falling edge Slope time LIN rising edge, 21.3 depending on RC-load 22 ATA6628 Voltage Divider 22.1 Divider ratio 22.2 Divider ratio error 22.3 Divider temperature drift VBATT range of divider 22.4 linearity 22 ...
Page 30
... Definition of Bus Timing Characteristics TXD (Input to transmitting node) TH Rec(max Dom(max) (Transceiver supply of transmitting node) TH Rec(min) TH Dom(min) RXD (Output of receiving node1) t rx_pdf(1) RXD (Output of receiving node2) Atmel ATA6628/ATA6630 Bit Bit t Bus_dom(max) LIN Bus Signal t Bus_dom(min) t rx_pdr(2) t Bit t Bus_rec(min) Thresholds of receiving node1 Thresholds of ...
Page 31
... Figure 9-2. Typical Application Circuit V Battery KL30 47 10nF + 100nF 10µF 10k NTRIG Microcontroller RXD TXD RESET ADC DIV_ON SP_MODE GND 9117G–AUTO–03/11 Atmel ATA6628/ATA6630 Ignition KL15 10µF 100nF + 47k 10k VBATT 1 Atmel EN ATA6628 2 ATA6630 NTRIG 3 MLP 5mm x 5mm 2.7k WAKE ...
Page 32
... NTRIG Microcontroller RXD TXD RESET ADC DIV_ON SP_MODE GND *) Note that the output voltage PVCC is no longer short-ciruit protected when boosting the output current by an external NPN-transistor. Atmel ATA6628/ATA6630 32 10µF 100nF + T1 *) MJD31C + 2.2µF 3 VBATT 1 Atmel ...
Page 33
... Note: No watchdog, no Battery voltage measurement, no local wake up, INH output not used 9117G–AUTO–03/11 VCC 22µF + 100nF + 100nF VBATT 1 Atmel EN 2 ATA6628/ ATA6630 NTRIG 3 QFN 5x5mm WAKE 0.65mm pitch 4 20 lead GND Atmel ATA6628/ATA6630 10k WD_OSC 14 NRES 13 TXD 12 INH 220pF R3 33 ...
Page 34
... Ordering Information Extended Type Number ATA6628-PGPW ATA6630-PGPW ATA6628-PGQW ATA6630-PGQW 11. Package Information Package: VQFN_5 x 5_20L Exposed pad 3.1 x 3.1 Dimensions in mm Not indicated tolerances ±0.05 Pin 1 identification Drawing-No.: 6.543-5129.01-4 Issue: 2; 09.02.07 Atmel ATA6628/ATA6630 34 Package Remarks QFN20 3.3V LIN system-basis-chip, Pb-free, 1.5k, taped and reeled QFN20 5V LIN system-basis-chip, Pb-free, 1 ...
Page 35
... Revision No. 9117G-AUTO-03/11 9117F-AUTO-10/10 9117E-AUTO-07/10 9117D-AUTO-05/10 9117C-AUTO-10/09 9117G–AUTO–03/11 Atmel ATA6628/ATA6630 History Features on page 1 changed Section 1 “Description” on pages changed Table 2-1 “Pin Description” on page 3 changed Section 3 “Functional Description” on page changed Section 4 “Modes of Operation” on pages changed Section 5 “Wake-up Scenarios from Silent or Sleep Mode” on pages changed Section 7 “ ...
Page 36
... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellec- tual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN THE ATMEL TERMS AND CONDITIONS OF SALES LOCATED ON THE ATMEL WEBSITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICU- LAR PURPOSE, OR NON-INFRINGEMENT ...