PIC18F25K22-I/SO Microchip Technology Inc., PIC18F25K22-I/SO Datasheet - Page 361
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PIC18F25K22-I/SO
Manufacturer Part Number
PIC18F25K22-I/SO
Description
32KB, Flash, 1536bytes-RAM, 8-bit Family, nanoWatt XLP, 28 SOIC .300in TUBE
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F45K22-IP.pdf
(496 pages)
Specifications of PIC18F25K22-I/SO
A/d Inputs
17-Channel, 10-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
256 Bytes
Input Output
24
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SOIC
Programmable Memory
32K Bytes
Ram Size
1.5K Bytes
Speed
64 MHz
Temperature Range
–40 to 125 °C
Timers
3-8-bit, 4-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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24.2.1
Register 24-14
readable and writable register which contains a control
bit that allows software to override the WDT enable
Configuration bit, but only if the Configuration bit has
disabled the WDT.
REGISTER 24-14: WDTCON: WATCHDOG TIMER CONTROL REGISTER
TABLE 24-3:
TABLE 24-4:
2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-1
bit 0
Note 1:
RCON
WDTCON
Legend: — = unimplemented, read as ‘0’. Shaded bits are not used by the Watchdog Timer.
CONFIG2H
Legend: — = unimplemented, read as ‘0’. Shaded bits are not used by the Watchdog Timer.
Name
Name
U-0
—
This bit has no effect if the Configuration bit, WDTEN, is enabled.
CONTROL REGISTER
shows the WDTCON register. This is a
Unimplemented: Read as ‘0’
SWDTEN: Software Enable or Disable the Watchdog Timer bit
1 = WDT is turned on
0 = WDT is turned off (Reset value)
IPEN
Bit 7
Bit 7
REGISTERS ASSOCIATED WITH WATCHDOG TIMER
CONFIGURATION REGISTERS ASSOCIATED WITH WATCHDOG TIMER
—
—
U-0
—
SBOREN
Bit 6
Bit 6
—
—
W = Writable bit
‘1’ = Bit is set
U-0
—
Bit 5
Bit 5
—
—
U-0
Preliminary
—
Bit 4
Bit 4
RI
—
WDPS<3:0>
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
Bit 3
Bit 3
U-0
TO
—
—
PIC18(L)F2X/4XK22
Bit 2
Bit 2
PD
—
(1)
U-0
—
Bit 1
POR
Bit 1
WDTEN<1:0>
—
x = Bit is unknown
U-0
—
SWDTEN
Bit 0
BOR
Bit 0
DS41412D-page 361
SWDTEN
R/W-0
on Page
on Page
Values
Values
Reset
Reset
361
353
60
bit 0
(1)
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