PIC16F676-I/ST Microchip Technology Inc., PIC16F676-I/ST Datasheet - Page 17
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PIC16F676-I/ST
Manufacturer Part Number
PIC16F676-I/ST
Description
14 PIN, 1.75 KB FLASH, 64 RAM, 12 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F676-IST.pdf
(132 pages)
Specifications of PIC16F676-I/ST
Comparators
1
Cpu Speed
5 MIPS
Eeprom Memory
128 Bytes
Input Output
12
Memory Type
Flash
Number Of Bits
8
Package Type
14-pin TSSO
Programmable Memory
1.75K Bytes
Ram Size
64 Bytes
Speed
20 MHz
Timers
1-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F676-I/ST
Manufacturer:
MICROCHIP
Quantity:
3 400
Part Number:
PIC16F676-I/ST
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
2.2.2.5
The PIR1 register contains the interrupt flag bits, as
shown in Register 2-5.
REGISTER 2-5:
2003 Microchip Technology Inc.
bit 7
bit 6
bit 5-4
bit 3
bit 2-1
bit 0
PIR1 Register
PIR1 — PERIPHERAL INTERRUPT REGISTER 1 (ADDRESS: 0Ch)
bit 7
EEIF: EEPROM Write Operation Interrupt Flag bit
1 = The write operation completed (must be cleared in software)
0 = The write operation has not completed or has not been started
ADIF: A/D Converter Interrupt Flag bit (PIC16F676 only)
1 = The A/D conversion is complete (must be cleared in software)
0 = The A/D conversion is not complete
Unimplemented: Read as ‘0’
CMIF: Comparator Interrupt Flag bit
1 = Comparator input has changed (must be cleared in software)
0 = Comparator input has not changed
Unimplemented: Read as ‘0’
TMR1IF: TMR1 Overflow Interrupt Flag bit
1 = TMR1 register overflowed (must be cleared in software)
0 = TMR1 register did not overflow
Legend:
R = Readable bit
- n = Value at POR
R/W-0
EEIF
R/W-0
ADIF
U-0
—
W = Writable bit
’1’ = Bit is set
U-0
—
Note:
R/W-0
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
CMIF
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>). User
software should ensure the appropriate
interrupt flag bits are clear prior to enabling
an interrupt.
PIC16F630/676
U-0
—
x = Bit is unknown
U-0
—
DS40039C-page 15
TMR1IF
R/W-0
bit 0