PIC16F873-04/SP Microchip Technology Inc., PIC16F873-04/SP Datasheet - Page 57
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PIC16F873-04/SP
Manufacturer Part Number
PIC16F873-04/SP
Description
28 PIN, 7 KB FLASH, 192 RAM, 22 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F873-04SP.pdf
(218 pages)
Specifications of PIC16F873-04/SP
A/d Inputs
5-Channel, 10-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
128 Bytes
Input Output
22
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
7K Bytes
Ram Size
192 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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7.0
Timer2 is an 8-bit timer with a prescaler and a
postscaler. It can be used as the PWM time-base for
the PWM mode of the CCP module(s). The TMR2 reg-
ister is readable and writable, and is cleared on any
device RESET.
The input clock (F
1:4,
T2CKPS1:T2CKPS0 (T2CON<1:0>).
The Timer2 module has an 8-bit period register, PR2.
Timer2 increments from 00h until it matches PR2 and
then resets to 00h on the next increment cycle. PR2 is
a readable and writable register. The PR2 register is
initialized to FFh upon RESET.
The match output of TMR2 goes through a 4-bit
postscaler (which gives a 1:1 to 1:16 scaling inclusive)
to generate a TMR2 interrupt (latched in flag bit
TMR2IF, (PIR1<1>)).
Timer2 can be shut-off by clearing control bit TMR2ON
(T2CON<2>), to minimize power consumption.
REGISTER 7-1:
2001 Microchip Technology Inc.
or
TIMER2 MODULE
bit 7
bit 6-3
bit 2
bit 1-0
1:16,
OSC
/4) has a prescale option of 1:1,
selected
T2CON: TIMER2 CONTROL REGISTER (ADDRESS 12h)
Unimplemented: Read as '0'
TOUTPS3:TOUTPS0: Timer2 Output Postscale Select bits
0000 = 1:1 Postscale
0001 = 1:2 Postscale
0010 = 1:3 Postscale
•
•
•
1111 = 1:16 Postscale
TMR2ON: Timer2 On bit
1 = Timer2 is on
0 = Timer2 is off
T2CKPS1:T2CKPS0: Timer2 Clock Prescale Select bits
00 = Prescaler is 1
01 = Prescaler is 4
1x = Prescaler is 16
bit 7
Legend:
R = Readable bit
- n = Value at POR
U-0
—
by
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0
R/W-0
control
R/W-0
bits
W = Writable bit
’1’ = Bit is set
R/W-0
Register 7-1 shows the Timer2 control register.
Additional information on timer modules is available in
the PICmicro™ Mid-Range MCU Family Reference
Manual (DS33023).
FIGURE 7-1:
Note 1: TMR2 register output can be software selected by the
Sets Flag
bit TMR2IF
Postscaler
1:1
T2OUTPS3:
T2OUTPS0
R/W-0
to
SSP module as a baud clock.
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
1:16
4
TMR2
Output
RESET
EQ
(1)
R/W-0
Comparator
TIMER2 BLOCK DIAGRAM
TMR2 Reg
PR2 Reg
PIC16F87X
x = Bit is unknown
R/W-0
1:1, 1:4, 1:16
Prescaler
DS30292C-page 55
T2CKPS1:
T2CKPS0
2
R/W-0
F
OSC
bit 0
/4
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