DSO6104A Agilent Technologies Test Equipment, DSO6104A Datasheet - Page 6

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DSO6104A

Manufacturer Part Number
DSO6104A
Description
Oscilloscope; 6.3 in. Diagonal TFT LCD; 4; + 2%; + 5 V; 50 Ohms
Manufacturer
Agilent Technologies Test Equipment
Type
Digitalr
Datasheet

Specifications of DSO6104A

Accuracy
± 2%
Bandwidth
1000 MHz
Brand/series
DSO6000A Series
Configuration
Bench/Portable
Display Type
Color TFT LCD
Impedance, Input
50 Ohms
Memory
8 Mpts
Number Of Channels
4
Resolution
XGA-768 Vertical by 1024 Horizontal Points(Screen Area), 640 Vertical by 1000 Horizontal Points(Waveform Area), 256 Levels of Intensity Scale
Sample Rate
4 GS/s
Voltage, Input
± 5 V
Performance characteristics
18
Vertical system: scope channels (continued)
ESD tolerance
Noise, RMS, input shorted
DC vertical gain accuracy*
DC vertical offset accuracy
Single cursor accuracy
Dual cursor accuracy*
*
1
Vertical system: digital channels (MSO6000A or MSO-upgraded DSO6000A only)
Number of channels
Threshold groupings
Threshold selections
User-defined threshold range
Maximum input voltage
Threshold accuracy*
Input dynamic range
Minimum input voltage swing
Input capacitance
Input resistance
Channel-to-channel skew
*
Denotes warranted specifications, all others are typical. Specifications are valid after a 30-minute warm-up period and ±10 °C from firmware calibration temperature.
1 mV/div is a magnification of 2 mV/div setting for 100 MHz models and 2 mV/div is a magnification of 4 mV/div setting for 300 MHz to 1 GHz models. For vertical accuracy
calculations, use full scale of 16 mV for 1 mV/div sensitivity setting and 32 mV for 2 mV/div sensitivity setting.
Denotes warranted specifications, all others are typical. Specifications are valid after a 30-minute warm-up period and ±10 °C from firmware calibration temperature.
1
1
1
±2 kV
MSO/DSO601xA: 0.50% FS or 250 µV, whichever is greater
MSO/DSO603xA: 0.50% FS or 300 µV, whichever is greater
MSO/DSO605xA: 0.50% FS or 360 µV, whichever is greater
MSO/DSO610xA: 0.65% FS or 360 µV, whichever is greater
±2.0% full scale
≤200 mV/div: ±0.1 div ±2.0 mV ±0.5% offset value;
>200 mV/div: ±0.1 div ±2.0 mV ±1.5% offset value
±{DC vertical gain accuracy + DC vertical offset accuracy + 0.2% full scale (~1/2 LSB)}
Example: for 50 mV signal, scope set to 10 mV/div (80 mV full scale), 5 mV offset,
accuracy = ±{2.0% (80 mV) + 0.1 (10 mV) + 2.0 mV + 0.5% (5 mV) + 0.2% (80 mV)} =
± 4.785 mV
±{DC vertical gain accuracy + 0.4% full scale (~1 LSB)}
Example: for 50 mV signal, scope set to 10 mV/div (80 mV full scale), 5 mV offset,
accuracy = ±{2.0% (80 mV) + 0.4% (80 mV)} = ±1.92 mV
16 logic timing channels – labeled D15 - D0
Pod 1: D7 - D0
Pod 2: D15 - D8
TTL, CMOS, ECL and user-definable (selectable by pod)
±8.0 V in 10 mV increments
±40 V peak CAT I; transient overvoltage 800 Vpk
±(100 mV + 3% of threshold setting)
±10 V about threshold
500 mV peak-to-peak
~8 pF
100 kΩ ±2% at probe tip
2 ns typical, 3 ns maximum
(continued)