PIC16F916-I/SP Microchip Technology Inc., PIC16F916-I/SP Datasheet - Page 199
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PIC16F916-I/SP
Manufacturer Part Number
PIC16F916-I/SP
Description
28 PIN, 14 KB FLASH, 352 RAM, 25 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F916-ISP.pdf
(272 pages)
Specifications of PIC16F916-I/SP
A/d Inputs
5-Channel, 10-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
25
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
14K Bytes
Ram Size
352 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
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Quantity
Price
Company:
Part Number:
PIC16F916-I/SP
Manufacturer:
Microchip Technology
Quantity:
1 800
Company:
Part Number:
PIC16F916-I/SP
Manufacturer:
JST
Quantity:
4 300
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FIGURE 16-8:
TABLE 16-6:
© 2005 Microchip Technology Inc.
0Bh,
8Bh
0Ch
0Dh
8Ch
8Dh
Legend: x = unknown, u = unchanged,
Addr
Instruction Flow
Note 1:
GIE bit
(INTCON<7>)
INTF Flag
(INTCON<1>)
CLKO
INT pin
OSC1
Instruction
Executed
Instruction
Fetched
PC
INTCON
2:
3:
4:
5:
Name
(3)
PIR1
PIR2
PIE1
PIE2
Shaded cells are not used by the interrupt module.
INTF flag is sampled here (every Q1).
Asynchronous interrupt latency = 3-4 T
Latency is the same whether Inst (PC) is a single cycle or a 2-cycle instruction.
CLKO is available only in INTOSC and RC Oscillator modes.
For minimum width of INT pulse, refer to AC specifications in Section 19.0 “Electrical Specifications”.
INTF is enabled to be set any time during the Q4-Q1 cycles.
SUMMARY OF INTERRUPT REGISTERS
OSFIF
OSFIE C2IE
Q1
EEIE
Bit 7
EEIF
GIE
Inst (PC - 1)
Inst (PC)
INT PIN INTERRUPT TIMING
(1)
Q2
PC
ADIE
Bit 6
PEIE
ADIF
C2IF
Q3
(4)
Q4
(5)
RCIF
RCIE
Bit 5
C1IF
C1IE
T0IE
Q1
Inst (PC + 1)
Inst (PC)
-
Q2
LCDIE
(1)
LCDIF
INTE
Bit 4
TXIF
TXIE
= unimplemented read as ‘0’, q = value depends upon condition.
PC + 1
CY
Q3
. Synchronous latency = 3 T
Preliminary
SSPIF
SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
RBIE
Bit 3
Q4
—
—
Interrupt Latency
PIC16F917/916/914/913
Q1
Dummy Cycle
CCP1IF
LVDIE
LVDIF
Bit 2
T0IF
Q2
PC + 1
—
Q3
TMR2IF TMR1IF 0000 0000 0000 0000
Q4
(2)
Bit 1
INTF
—
—
CY
, where T
Q1
Dummy Cycle
Inst (0004h)
CCP2IE 0000 -0-0 0000 -0-0
CCP2IF 0000 -0-0 0000 -0-0
Q2
RBIF
Bit 0
0004h
CY
Q3
= instruction cycle time.
0000 000x 0000 000x
POR, BOR
Q4
Value on
Q1
DS41250E-page 197
Inst (0005h)
Q2
Inst (0004h)
0005h
Value on
all other
Q3
Resets
Q4
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