PIC16F916-I/SP Microchip Technology Inc., PIC16F916-I/SP Datasheet - Page 23
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PIC16F916-I/SP
Manufacturer Part Number
PIC16F916-I/SP
Description
28 PIN, 14 KB FLASH, 352 RAM, 25 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F916-ISP.pdf
(272 pages)
Specifications of PIC16F916-I/SP
A/d Inputs
5-Channel, 10-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
25
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
14K Bytes
Ram Size
352 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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2.2.2.1
The Status register, shown in Register 2-1, contains:
• the arithmetic status of the ALU
• the Reset status
• the bank select bits for data memory (SRAM)
The Status register can be the destination for any
instruction, like any other register. If the Status register
is the destination for an instruction that affects the Z,
DC or C bits, then the write to these three bits is
disabled. These bits are set or cleared according to the
device logic. Furthermore, the TO and PD bits are not
writable. Therefore, the result of an instruction with the
Status register as destination may be different than
intended.
REGISTER 2-1:
© 2005 Microchip Technology Inc.
bit 7
bit 6-5
bit 4
bit 3
bit 2
bit 1
bit 0
Status Register
STATUS – STATUS REGISTER (ADDRESS: 03h, 83h, 103h OR 183h)
IRP: Register Bank Select bit (used for indirect addressing)
1 = Bank 2, 3 (100h-1FFh)
0 = Bank 0, 1 (00h-FFh)
RP<1:0>: Register Bank Select bits (used for direct addressing)
00 = Bank 0 (00h-7Fh)
01 = Bank 1 (80h-FFh)
10 = Bank 2 (100h-17Fh)
11 = Bank 3 (180h-1FFh)
TO: Time-out bit
1 = After power-up, CLRWDT instruction or SLEEP instruction
0 = A WDT time-out occurred
PD: Power-down bit
1 = After power-up or by the CLRWDT instruction
0 = By execution of the SLEEP instruction
Z: Zero bit
1 = The result of an arithmetic or logic operation is zero
0 = The result of an arithmetic or logic operation is not zero
DC: Digit Carry/Borrow bit (ADDWF, ADDLW,SUBLW,SUBWF instructions)
1 = A carry-out from the 4th low-order bit of the result occurred
0 = No carry-out from the 4th low-order bit of the result
C: Carry/Borrow bit (ADDWF, ADDLW, SUBLW, SUBWF instructions)
1 = A carry-out from the Most Significant bit of the result occurred
0 = No carry-out from the Most Significant bit of the result occurred
Legend:
R = Readable bit
- n = Value at POR
bit 7
R/W-0
Note 1: For Borrow, the polarity is reversed. A subtraction is executed by adding the two’s
IRP
complement of the second operand. For rotate (RRF, RLF) instructions, this bit is
loaded with either the high or low-order bit of the source register.
R/W-0
RP1
R/W-0
RP0
Preliminary
W = Writable bit
‘1’ = Bit is set
PIC16F917/916/914/913
R-1
TO
For example, CLRF STATUS will clear the upper three
bits and set the Z bit. This leaves the Status register as
‘000u u1uu’ (where u = unchanged).
It is recommended, therefore, that only BCF, BSF,
SWAPF and MOVWF instructions are used to alter the
Status register, because these instructions do not affect
any Status bits. For other instructions not affecting any
Status bits (see Section 17.0 “Instruction Set
Summary”).
Note 1: The C and DC bits operate as a Borrow
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R-1
PD
and Digit Borrow out bit, respectively, in
subtraction. See the SUBLW and SUBWF
instructions for examples.
R/W-x
Z
(1)
(1)
x = Bit is unknown
R/W-x
DC
DS41250E-page 21
R/W-x
C
bit 0
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