PIC16F872-I/SP Microchip Technology Inc., PIC16F872-I/SP Datasheet - Page 35

• Manufacturer Part Number: PIC16F872-I/SP
• Description: 28 PIN, 7 KB FLASH, 128 RAM, 22 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F872-I/SP

• A/d Inputs: 5-Channel, 10-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 64 Bytes
• Input Output: 22
• Interface: I2C/SPI
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

4.3
PORTC is an 8-bit wide, bi-directional port. The corre-
sponding data direction register is TRISC. Setting a
TRISC bit (= ‘1’) will make the corresponding PORTC
pin an input (i.e., put the corresponding output driver in
a Hi-Impedance mode). Clearing a TRISC bit (= ‘0’) will
make the corresponding PORTC pin an output (i.e., put
the contents of the output latch on the selected pin).
PORTC is multiplexed with several peripheral functions
(Table 4-5). PORTC pins have Schmitt Trigger input
buffers.
When the I
can be configured with normal I
levels by using the CKE bit (SSPSTAT<6>).
When enabling peripheral functions, care should be
taken in defining TRIS bits for each PORTC pin. Some
peripherals override the TRIS bit to make a pin an out-
put, while other peripherals override the TRIS bit to
make a pin an input. Since the TRIS bit override is in
effect while the peripheral is enabled, read-modify-
write instructions (BSF, BCF, XORWF) with TRISC as
the destination should be avoided. The user should
refer to the corresponding peripheral section for the
correct TRIS bit settings.
FIGURE 4-5:
© 2006 Microchip Technology Inc.
Port/Peripheral Select
Peripheral Data Out
Data Bus
WR
PORT
WR
TRIS
RD
TRIS
Peripheral
OE
RD
PORT
Peripheral Input
Note 1:
(3)
2:
3:
PORTC and the TRISC Register
2
I/O pins have diode protection to V
Port/Peripheral select signal selects between port
data and peripheral output.
Peripheral OE (output enable) is only activated if
peripheral select is active.
C module is enabled, the PORTC (4:3) pins
TRIS Latch
Data Latch
D
D
CK
CK
Q
Q
Q
Q
(2)
PORTC BLOCK DIAGRAM
(PERIPHERAL OUTPUT
OVERRIDE) RC<2:0>
RC<7:5>
0
1
Q
2
C levels or with SMBus
EN
D
Schmitt
Trigger
DD
and V
V
V
N
P
SS
DD
SS
I/O pin
.
(1)
FIGURE 4-6:
Port/Peripheral Select
Peripheral Data Out
Data Bus
WR
PORT
WR
TRIS
RD
TRIS
Peripheral
OE
RD
PORT
SSPl Input
Note 1:
(3)
2:
3:
I/O pins have diode protection to V
Port/Peripheral select signal selects between port data
and peripheral output.
Peripheral OE (output enable) is only activated if
peripheral select is active.
Data Latch
TRIS Latch
D
D
CK
CK
(2)
Q
Q
Q
Q
PORTC BLOCK DIAGRAM
(PERIPHERAL OUTPUT
OVERRIDE) RC<4:3>
0
1
PIC16F872
Q
SSPSTAT<6>
CKE
EN
D
Schmitt
Trigger
DS30221C-page 33
DD
and V
Vss
0
1
V
P
N
DD
SS
Schmitt
Trigger
with
SMBus
Levels
.
pin
I/O
(1)