DS90LT012AQMF/NOPB National Semiconductor, DS90LT012AQMF/NOPB Datasheet - Page 5

• Manufacturer Part Number: DS90LT012AQMF/NOPB
• Description: IC LINE RCVR LVDS DIFF SOT23-5
• Manufacturer: National Semiconductor
• Type: Line Receiverr

Specifications of DS90LT012AQMF/NOPB

• Number Of Drivers/receivers: 0/1
• Protocol: LVDS
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: SOT-23-5, SC-74A, SOT-25
• Number Of Elements: 1
• Number Of Receivers: 1
• Number Of Drivers: 1
• Input Type: CMOS
• Operating Supply Voltage (typ): 3.3V
• Diff. Input Low Threshold Volt: -100mV
• Transmission Data Rate: 400Mbps
• Propagation Delay Time: 3.5ns
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 5
• Package Type: SOT-23
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DS90LT012AQMF

−100mV to 0V. This is useful for fail-safe biasing. The thresh-
old region is shown in the Voltage Transfer Curve (VTC) in
Figure
at about −30mV. Note that with V
a HIGH state. With an external fail-safe bias of +25mV ap-
plied, the typical differential noise margin is now the difference
from the switch point to the bias point. In the example below,
this would be 55mV of Differential Noise Margin (+25mV −
(−30mV)). With the enhanced threshold region of −100mV to
FAIL SAFE BIASING
External pull up and pull down resistors may be used to pro-
vide enough of an offset to enable an input failsafe under
open-circuit conditions. This configuration ties the positive
LVDS input pin to VDD thru a pull up resistor and the negative
LVDS input pin is tied to GND by a pull down resistor. The pull
up and pull down resistors should be in the 5kΩ to 15kΩ range
to minimize loading and waveform distortion to the driver. The
common-mode bias point ideally should be set to approxi-
mately 1.2V (less than 1.75V) to be compatible with the
internal circuitry. Please refer to application note AN-1194,
“Failsafe Biasing of LVDS Interfaces” for more information.
PROBING LVDS TRANSMISSION LINES
Always use high impedance (> 100kΩ), low capacitance
(< 2 pF) scope probes with a wide bandwidth (1 GHz) scope.
Improper probing will give deceiving results.
CABLES AND CONNECTORS, GENERAL COMMENTS
When choosing cable and connectors for LVDS it is important
to remember:
4. The typical DS90LT012AQ LVDS receiver switches
ID
= 0V, the output will be in
FIGURE 4. VTC of the DS90LT012AQ LVDS Receiver
5
0V, this small external fail-safe biasing of +25mV (with respect
to 0V) gives a DNM of a comfortable 55mV. With the standard
threshold region of ±100mV, the external fail-safe biasing
would need to be +25mV with respect to +100mV or +125mV,
giving a DNM of 155mV which is stronger fail-safe biasing
than is necessary for the DS90LT012AQ. If more DNM is re-
quired, then a stronger fail-safe bias point can be set by
changing resistor values.
Use controlled impedance media. The cables and connectors
you use should have a matched differential impedance of
about 100Ω. They should not introduce major impedance dis-
continuities.
Balanced cables (e.g. twisted pair) are usually better than
unbalanced cables (ribbon cable, simple coax) for noise re-
duction and signal quality. Balanced cables tend to generate
less EMI due to field canceling effects and also tend to pick
up electromagnetic radiation a common-mode (not differential
mode) noise which is rejected by the receiver.
For cable distances < 0.5M, most cables can be made to work
effectively. For distances 0.5M
3) twisted pair cable works well, is readily available and rela-
tively inexpensive.
30063929
≤
d
≤
10M, CAT 3 (category
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