SI9912DB Vishay, SI9912DB Datasheet - Page 7

• Manufacturer Part Number: SI9912DB
• Description: MOSFET & Power Driver ICs SMD SI9912 Kit
• Manufacturer: Vishay

Specifications of SI9912DB

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Bootstrap Supply Operation
(see Functional Block Diagram)
The power to drive the high-side MOSFET (Q2) gate comes
from the bootstrap capacitor (C
through D1 during the time when the low-side MOSFET is on
(V
charge to turn on the high-side MOSFET
sized to be greater than ten times the high-side MOSFET gate
capacitance, and large enough to supply the bootstrap current
(I
droop.
Shutdown (SD)
(shutdown input, active low)
When this pin is high, the IC operates normally. When this pin
is low, both high- and low-side MOSFETs are turned off .
Document Number: 71311
S-40134—Rev. B, 16-Feb-04
APPLICATIONS
BOOT
S
is at GND potential), and then provides the necessary
) during the high-side on time, without significant voltage
FIGURE 1.
Enable
PWM IN
Typical Applications Schematic Circuit Used to Obtain Typical Rising and Falling Switching Waveforms
BOOT
1
2
3
4
). This capacitor charges
OUT
GND
IN
SD
.
H
C
Si9912
BOOT
U1
BOOT
OUT
V
should be
V
DD
S
L
8
7
6
5
+5 V
C2
0.1 mF
C1
0.1 mF
4
4
Layout Considerations
There are a few critical layout considerations for these parts.
Firstly, the IC must be decoupled as closely as possible to the
power pins. Secondly the IC should be placed physically close
to the high- and low-side MOSFETs it is driving. The major
consideration is that the MOSFET gates must be charged or
discharged in a few nanoseconds, and the peak current to do
this is of the order of 1 A. This current must flow from the
decoupling and bootstrap capacitors to the IC, and from the
output driver pin to the MOSFET gate, returning from the
MOSFET source to the IC. The aim of the layout is to reduce
the parasitic inductance of these current paths as much as
possible. This is accomplished by making these traces as
short as possible, and also running trace and its current return
path adjacent to each other.
+V
GND
DC
Q1
Si4412
Q2
Si4412
15 mH
L1
0.1 mF
C3
1 mF
C5
GND
Vishay Siliconix
15 mF
C4
GND
+
R
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Si9912
7