ATA6826-TUQY Atmel, ATA6826-TUQY Datasheet - Page 6

• Manufacturer Part Number: ATA6826-TUQY
• Description: MOSFET & Power Driver ICs Triple Half-Bridge Driver
• Manufacturer: Atmel
• Type: High Side/Low Sider

Specifications of ATA6826-TUQY

• Product: Half-Bridge Drivers
• Rise Time: 100 ns
• Fall Time: 100 ns
• Supply Voltage (min): 5.6 V
• Supply Current: 6 mA
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC
• Bridge Type: Half Bridge
• Minimum Operating Temperature: - 40 C
• Number Of Drivers: 3
• Number Of Outputs: 3
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

3.2
3.3
3.4
3.5
3.6
6
Power-supply Fail
Open-load Detection
Overtemperature Protection
Short-circuit Protection
Inhibit
Atmel ATA6826
In case of undervoltage at pin VS, the Power-Supply Fail bit (PSF) in the output register is set
and all outputs are disabled. To detect an undervoltage, its duration has to be longer than the
undervoltage detection delay time t
voltage recovers to a normal operating value. The PSF bit stays high until it is reset by the SRR
(Status Register Reset) bit in the input register.
If the current through a high-side or low-side switch in the ON-state stays below the open-load
detection threshold, the open-load detection bit (OPL) in the output register is set.
The OPL bit stays high until it is reset by the SRR bit in the input register. To detect an open
load, its duration has to be longer than the open-load detection delay time t
If the junction temperature of one or more output stages exceeds the thermal prewarning thresh-
old, T
temperature falls below the thermal prewarning threshold, T
bit can be read without transferring a complete 16-bit data word. The status of TP is available at
pin DO with the falling edge of CS. After the microcontroller has read this information, CS is set
high and the data transfer is interrupted without affecting the status of input and output registers.
If the junction temperature of one or more output stages exceeds the thermal shutdown thresh-
old, T
low. The outputs can be enabled again when the temperature falls below the thermal shutdown
threshold, T
pre-warning and shutdown threshold avoids oscillations.
The output currents are limited by a current regulator. Overcurrent detection is activated by
writing a high to the OCS (Overcurrent Shutdown) bit in the input register. When the current in
an output stage exceeds the overcurrent limitation and shutdown threshold, it is switched off
after a delay time (t
bit in the output register is set to low. For OCS = low the overcurrent shutdown is inactive. The
SCD bit is also set if the current exceeds the overcurrent limitation and shutdown threshold, but
the outputs are not affected. By writing a high to the SRR bit in the input register the SCD bit is
reset and the disabled outputs are enabled.
Applying 0V to pin 10 (INH) inhibits the Atmel
All output switches are then turned off and switched to tri-state. The data in the output register is
deleted. The current consumption is reduced to less than 2µA at pin VS and less than 25µA at
pin VCC. The output switches can be activated again by switching pin 10 (INH) to 5V which
initiates an internal power-on reset.
j switch off
jPW set
jswitch on
, the temperature prewarning bit (TP) in the output register is set. When the
, all outputs are disabled and the corresponding bits in the output register are set to
dSd
and the SRR bit in the input register is set to high. Hysteresis of thermal
). The short-circuit detection bit (SCD) is set and the corresponding status
dUV
. The outputs are enabled immediately when supply
®
ATA6826.
jPW reset
, the bit TP is reset. The TP
dSd
.
4834G–BCD–01/11