ispPAC-POWR6AT6-01SN32I Lattice, ispPAC-POWR6AT6-01SN32I Datasheet - Page 22

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ispPAC-POWR6AT6-01SN32I

Manufacturer Part Number
ispPAC-POWR6AT6-01SN32I
Description
Supervisory Circuits Prec Prog Pwr Supply Seq Mon Trim IND
Manufacturer
Lattice
Series
ispPAC®r
Datasheet

Specifications of ispPAC-POWR6AT6-01SN32I

Number Of Voltages Monitored
6
Monitored Voltage
Adjustable
Undervoltage Threshold
Adjustable
Overvoltage Threshold
Adjustable
Manual Reset
Not Resettable
Watchdog
No Watchdog
Supply Voltage (max)
3.96 V
Supply Voltage (min)
2.8 V
Supply Current (typ)
10000 uA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
QFNS-32
Minimum Operating Temperature
- 40 C
Applications
Power Supply Controller/Monitor
Voltage - Input
-0.3 V ~ 5.9 V
Voltage - Supply
2.8 V ~ 3.96 V
Current - Supply
10mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
*
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISPPAC-POWR6AT6-01SN32I
Manufacturer:
LATTICE
Quantity:
560
Lattice Semiconductor
Figure 3-18. I
The ispPAC-POWR6AT6 also provides the user with the ability to program the trim values over the I
writing the appropriate binary word to the associated trim register (Figure 3-19).
Figure 3-19. I
Monitoring Closed Loop Trim with the CLTLOCK/SMBA Pin
The ispPAC-POWR6AT6 uses a simple algorithm to determine if closed-loop trimming has reached a stable or
locked value. In Figure 3-20, the flow diagram shows whenever the closed-loop trim enable pin (CLTENb) is
asserted (low) the status of all six trim output pins is tested and updated at periodic intervals (refer to Table 3-2 for
typical cycle times). If a trim lock condition exists for a given pin, a lock result is set and processing continues. Pins
not selected for closed-loop trim are automatically reported to be in the lock condition, but timing is kept constant to
preserve a constant update rate regardless of how many trim outputs are really involved.
2
2
C Reset Register
C Trim Registers
0x8 - RESET (Write Only)
0x9 - TRIM1_TRIM (Read/Write)
0xA - TRIM2_TRIM (Read/Write)
0xB - TRIM3_TRIM (Read/Write)
0xC - TRIM4_TRIM (Read/Write)
0xD - TRIM5_TRIM (Read/Write)
0xE - TRIM6_TRIM (Read/Write)
D7
D7
D7
D7
D7
D7
b7
b7
b7
b7
b7
b7
b7
X
D6
D6
D6
D6
D6
D6
b6
b6
b6
b6
b6
b6
b6
X
D5
D5
D5
D5
D5
D5
b5
b5
b5
b5
b5
b5
b5
X
D4
D4
D4
D4
D4
D4
b4
b4
b4
b4
b4
b4
b4
X
3-22
D3
D3
D3
D3
D3
D3
b3
b3
b3
b3
b3
b3
b3
X
D2
D2
D2
D2
D2
D2
b2
b2
b2
b2
b2
b2
b2
X
ispPAC-POWR6AT6 Data Sheet
D1
D1
D1
D1
D1
D1
b1
b1
b1
b1
b1
b1
b1
X
D0
D0
D0
D0
D0
D0
b0
b0
b0
b0
b0
b0
b0
X
2
C interface, by

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