PEB3086FV14XP Lantiq, PEB3086FV14XP Datasheet - Page 26
PEB3086FV14XP
Manufacturer Part Number
PEB3086FV14XP
Description
Manufacturer
Lantiq
Datasheet
1.PEB3086FV14XP.pdf
(262 pages)
Specifications of PEB3086FV14XP
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
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Table 2
Pin No.
MQFP-64
TQFP-64
63
62
61
Data Sheet
Symbol
AUX4
AUX5
AUX6
ISAC-SX Pin Definitions and Functions (cont’d)
Input (I)
Output (O)
Open Drain
(OD)
I/O (OD)
I/O (OD)
I/O (OD)
Function
• Auxiliary Port 4 (input/output)
This pin is programmable as general input/output.
The state of the pin can be read from (input) / written
to (output) a register.
• MBIT (input/output)
If ACFG2.A4SEL is set to ’1’, pin AUX4 is used as
M-bit input (LT-S / NT / Int. NT mode) or as M-bit
output (TE / LT-T mode) for multiframe
synchronization.
• Auxiliary Port 5 (input/output)
This pin is programmable as general input/output.
The state of the pin can be read from (input) / written
to (output) a register.
• FBOUT - FSC/BCL output
If ACFG2.A5SEL is set to ’1’, pin AUX5 outputs
either an FSC signal or a BCL signal selected via
ACFG2.FBS.
INT0
This pin is programmable as general input/output.
The state of the pin can be read from (input) / written
to (output) a register.
Additionally, as input it can generate a maskable
interrupt to the host, which is either edge or level
triggered. An internal pull up resistor is connected to
this pin (open drain mode only), if push pull
characteristic is selected no pull up is available.
As output an LED can directly be connected to this
pin.
26
Pin Configuration
PEB 3086
2003-01-30
ISAC-SX
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