PSB21150FV14XT Lantiq, PSB21150FV14XT Datasheet - Page 35
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PSB21150FV14XT
Manufacturer Part Number
PSB21150FV14XT
Description
Manufacturer
Lantiq
Datasheet
1.PSB21150FV14XT.pdf
(270 pages)
Specifications of PSB21150FV14XT
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
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3.2.1
The serial control interface (SCI) is compatible to the SPI interface of Motorola or
Siemens C510 family of microcontrollers.
The SCI consists of 4 lines: SCL, SDX, SDR and CS. Data is transferred via the lines
SDR and SDX at the rate given by SCL. The falling edge of CS indicates the beginning
of a serial access to the registers. The IPAC-X latches incoming data at the rising edge
of SCL and shifts out at the falling edge of SCL. Each access must be terminated by a
rising edge of CS. Data is transferred in groups of 8 bits with the MSB first.
Figure 8
Figure 8
Data Sheet
CS
SCL
SDR
SDX
CS
SCL
SDR
SDX
shows the timing of a one byte read/write access via the serial control interface.
Write Access
Read Access
Serial Control Interface (SCI)
Serial Control Interface Timing
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
7 6 5 4 3 2 1
Header
Header
0
write
read
'0'
'1'
7 6 5 4 3 2 1 0
Address
Address
35
Description of Functional Blocks
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
Data
Data
PSB/PSF 21150
21150_19
2003-01-30
IPAC-X
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