MC145572ACR2 Freescale Semiconductor, MC145572ACR2 Datasheet - Page 182
MC145572ACR2
Manufacturer Part Number
MC145572ACR2
Description
Manufacturer
Freescale Semiconductor
Datasheet
1.MC145572ACR2.pdf
(264 pages)
Specifications of MC145572ACR2
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
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10.10.1
10–20
10.10
SFAX
DCL
FSX
Figure 10–10. SFAX Input Timing in IDL2 (Master or Slave) Short Frame Mode
93
SUPERFRAME TRANSMIT AND RECEIVE (SFAX/SFAR) TIMING
SFAX Input Timing in IDL2 (Master or Slave) Short Frame Mode
NOTES:
Ref. No.
1. See Section 10.7 for FSX jitter requirements and specifications.
2. SFAX must occur every 96 FSX 8 kHz frames.
3. SFAX is sampled on the next DCL falling edge after FSX is asserted.
91
92
93
94
FSX Period
SFAX Period
SFAX Input High Before Falling Edge of DCL (SFAX Setup
Time)
SFAX Input High After Falling Edge of DCL (SFAX Hold Time)
94
Freescale Semiconductor, Inc.
91
For More Information On This Product,
Go to: www.freescale.com
Parameter
MC145572
92
12.0
Min
125
25
25
Max
—
—
—
—
Unit
ms
ns
ns
MOTOROLA
s
Note
1
2
3
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