PSB3186FV14XP Infineon Technologies, PSB3186FV14XP Datasheet - Page 69
PSB3186FV14XP
Manufacturer Part Number
PSB3186FV14XP
Description
Manufacturer
Infineon Technologies
Datasheet
1.PSB3186FV14XP.pdf
(200 pages)
Specifications of PSB3186FV14XP
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
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IOM-2 Frame Structure (TE Mode)
The frame structure on the IOM-2 data ports (DU,DD) of a master device in IOM-2
terminal mode is shown in
Figure 36
The frame is composed of three channels
• Channel 0 contains 144-kbit/s of user and signaling data (2B + D), a MONITOR
• Channel 1 contains two 64-kbit/s intercommunication channels (IC) plus a MONITOR
• Channel 2 is used for the TlC-bus access. Only the command/indicate bits are
Data Sheet
programming channel (MON0) and a command/indication channel (CI0) for control
and programming of the layer-1 transceiver.
and command/indicate channel (MON1, CI1) to program or transfer data to other
IOM-2 devices.
specified in this channel.
IOM
Ò
-2 Frame Structure in Terminal Mode
Figure
36.
69
Description of Functional Blocks
ISAC-SX TE
PSB 3186
2003-01-30
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