PEB24901HV12 Lantiq, PEB24901HV12 Datasheet - Page 30

• Manufacturer Part Number: PEB24901HV12
• Manufacturer: Lantiq

Specifications of PEB24901HV12

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Boundary Scan
Number
TDI ––>
Note: I/O pins are bidirectional only for device test purpose. For the function of these pins
refer to section 1.2.
TAP Controller
The Test Access Port (TAP) controller implements the state machine defined in the
JTAG standard IEEE Std. 1149.1. Transitions on the pin TMS cause the TAP controller
to perform a state change.
Following the standard definition 5 instructions are executable. Additionally, there is one
specific test instruction.
TAP controller instructions:
Semiconductor Group
Code
11XX
0000
0001
0010
0011
1000
1001
1010
1011
01xx
45
46
Instruction
EXTEST
INTEST
SAMPLE/PRELOAD
IDCODE
reserved
reserved
reserved
SSP
reserved
BYPASS
Pin Number
5
4
Pin Name
Function
External testing
Internal testing
Snap-shot testing
Reading ID code
Send single pulses
Bypass operation
CL15
SDR
29
Type
I/O
I
Number of
Scan Cells
PEB 24901
3
1
02.95