PSB2115HV1.2 Lantiq, PSB2115HV1.2 Datasheet - Page 43

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PSB2115HV1.2

Manufacturer Part Number
PSB2115HV1.2
Description
Manufacturer
Lantiq
Datasheet

Specifications of PSB2115HV1.2

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compare values programmed in special registers (TEI1, TEI2). A valid address will be
recognized in case the high and low byte of the address field match one of the compare
values. The IPAC can be called (addressed) with the following address combinations:
– SAP1/TEI1
– SAP1/FF
There are 5 different operating modes which can be set via the MODED register:
Auto Mode (MDS2, MDS1 = 00)
Characteristics:
If a 2-byte address field is selected, the high address byte is compared with the fixed
value FE
in SAP1 and SAP2 registers. According to the ISDN LAPD protocol, bit 1 of the high byte
address will be interpreted as COMMAND/RESPONSE bit (C/R) dependent on the
setting of the CRI bit in SAP1, and will be excluded from the address comparison.
Similarly, the low address byte is compared with the fixed value FF
– SAP2/TEI2
– SAP2/FF
– FE
– FE
– FE
Only the logical connection identified through the address combination SAP1, TEI1 will
be processed in the auto mode, all others are handled as in the non-auto mode. The
logical connection handled in the auto mode must have a window size 1 between
transmitted and acknowledged frames. HDLC frames with address fields that do not
match with any of the address combinations, are ignored by the IPAC.
In case of a 1-byte address, TEI1 and TEI2 will be used as compare registers. According
to the X.25 LAPB protocol, the value in TEI1 will be interpreted as COMMAND and the
value in TEI2 as RESPONSE.
The control field is stored in RHCRD register and the I field in RFIFOD. Additional
information is available in RSTAD.
Non-Auto Mode (MDS2, MDS1 = 01)
Characteristics:
All frames with valid addresses are accepted and the bytes following the address are
transferred to the P via RHCRD and RFIFOD. Additional information is available in
RSTAD.
Semiconductor Group
H
H
H
(FC
(FC
(FC
H
H
H
H
or FC
H
H
)/TEI1
)/TEI2
)/FF
H
H
(group address) as well as with two individually programmable values
Arbitrary window sizes
– Full address recognition (1 or 2 bytes).
– Normal (mod 8) or extended (mod 128) control field format
– Automatic processing of numbered frames of an HDLC procedure.
Full address recognition (1 or 2 bytes)
43
Functional Description
H
(group TEI) and two
PSB 2115
PSF 2115
11.97

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