PSB21150HV14XP Infineon Technologies, PSB21150HV14XP Datasheet - Page 14
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PSB21150HV14XP
Manufacturer Part Number
PSB21150HV14XP
Description
Manufacturer
Infineon Technologies
Datasheet
1.PSB21150HV14XP.pdf
(270 pages)
Specifications of PSB21150HV14XP
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
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Table 1
Operating modes
Supply voltage
Technology
Package
Transceiver
Transformer ratio for the
transmitter
receiver
Test Functions
Microcontroller Interface
Crystal
Buffered 7.68 MHz output
Controller data access to
IOM-2 timeslots
Data control and
manipulation
IOM-2
IOM-2 Interface
Data Sheet
Comparison of the IPAC-X with the Previous Version IPAC:
IPAC-X PSB 21150
TE, LT-T, LT-S, NT, Int. NT TE, LT-T, LT-S, Int. NT
3.3 V ± 5 %
CMOS
P-MQFP-64 / P-TQFP-64
1:1
1:1
- Dig. loop via Layer 2 (TLP)
- Layer 1 disable (DIS_TR)
- Analog loop
Serial interface (SCI)
8-bit parallel interface:
Motorola Mux
Siemens/Intel Mux
Siemens/Intel Non-Mux
direct/ indirect Addressing
7.68 MHz
Provided
All timeslots;
various possibilities of data
access
Various possibilities of data
control and data
manipulation (enable/
disable, shifting, looping,
switching)
Double clock (DCL),
bit clock pin (BCL),
serial data strobe 1 (SDS1)
serial data strobe 2 (SDS2)
(LP_A-bit, EXLP-bit, ARL)
14
IPAC PSB 2115
5 V ± 5 %
CMOS
P-MQFP-64 / P-TQFP-64
2:1
2:1
- Dig. loop via Layer 2(TLP)
- Layer 1 disable (TEM)
- Analog loop (ARL)
Not provided
8-bit parallel interface:
Motorola Mux
Siemens/Intel Mux
Siemens/Intel Non-Mux
7.68 MHz
Provided
Restricted access to
B- and IC-channel
B- and IC-channel looping
Double clock (DCL),
bit clock (BCL),
serial data strobe (SDS)
PSB/PSF 21150
2003-01-30
Overview
IPAC-X
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